R5F21238DFP#U0 Renesas Electronics America, R5F21238DFP#U0 Datasheet - Page 167
![IC R8C/23 MCU FLASH 48-LQFP](/photos/12/38/123822/r5f21238dfp_u0_sml.jpg)
R5F21238DFP#U0
Manufacturer Part Number
R5F21238DFP#U0
Description
IC R8C/23 MCU FLASH 48-LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/23r
Specifications of R5F21238DFP#U0
Core Size
16/32-Bit
Program Memory Size
64KB (64K x 8)
Peripherals
POR, Voltage Detect, WDT
Core Processor
R8C
Speed
20MHz
Connectivity
CAN, I²C, LIN, SIO, SSU, UART/USART
Number Of I /o
41
Program Memory Type
FLASH
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
No. Of I/o's
41
Ram Memory Size
3KB
Cpu Speed
20MHz
No. Of Timers
4
Digital Ic Case Style
LQFP
Embedded Interface Type
CAN, I2C, UART
Rohs Compliant
Yes
Cpu Family
R8C
Device Core Size
16b
Frequency (max)
20MHz
Interface Type
I2C/UART
Total Internal Ram Size
3KB
# I/os (max)
41
Number Of Timers - General Purpose
5
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
3V
On-chip Adc
12-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
48
Package Type
LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
RCDK8C - KIT DEV EVAL FOR CAN R8C/23R0K521237S000BE - KIT DEV RSK R8C/23R0E521237CPE00 - EMULATOR COMPACT R8C/20/21/22/23
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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R8C/22 Group, R8C/23 Group
Rev.2.00 Aug 20, 2008
REJ09B0251-0200
Figure 14.12
Underflow signal of timer
Conditions: A period from one rising edge to the next rising edge of measurement pulse is measured (TEDGSEL = 0) with
NOTES:
1. The contents of the read-out buffer can be read when the TRA register is read in pulse period measurement mode.
2. After an active edge of measurement pulse is input, the TEDGF bit in the TRACR register is set to 1 (active edge found) when the timer RA
3. The TRA register should be read before the next active edge is input after the TEDGF bit is set to 1 (active edge found).
4. When set to 0 by a program, use a MOV instruction to write 0 to the TEDGF bit in the TRACR register. At the same time, write 1 to the
5. When set to 0 by a program, use a MOV instruction to write 0 to the TUNDF bit. At the same time, write 1 to the TEDGF bit.
6. The TUNDF and TEDGF bits are both set to 1 if the timer RA underflows and reloads on an active edge simultaneously.
Contents of read-out
Measurement pulse
prescaler underflows for the second time.
The content in the read-out buffer is retained until the TRA register is read. If the TRA register is not read before the next active edge is
input, the measured result of the previous period is retained.
TUNDF bit in the TRACR register.
(TRAIO pin input)
Contents of TRA
TRACR register
TRACR register
TRACR register
IR bit in TRAIC
TSTART bit in
RA prescaler
TEDGF bit in
TUNDF bit in
the default value of the TRA register as 0Fh.
buffer
register
Operating Example of Pulse Period Measurement Mode
(1)
1
0
1
0
1
0
1
0
1
0
Page 145 of 501
Starts counting
Set to 1 by program
0Fh
0Fh
0Eh 0Dh 0Fh 0Eh 0Dh 0Ch 0Bh 0Ah 09h 0Fh 0Eh 0Dh
0Eh
Retained
(2)
TRA reloads
0Dh
TRA read
Set to 0 when interrupt request is acknowledged, or set by program
Set to 0 by program
(3)
0Bh 0Ah
Retained
(2)
TRA reloads
(4)
09h
0Dh
Set to 0 by program
01h 00h 0Fh 0Eh
01h 00h 0Fh 0 E h
(6)
14. Timers
(5)
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