R5F21238DFP#U0 Renesas Electronics America, R5F21238DFP#U0 Datasheet - Page 526

• Manufacturer Part Number: R5F21238DFP#U0
• Description: IC R8C/23 MCU FLASH 48-LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/2x/23r

Specifications of R5F21238DFP#U0

• Core Size: 16/32-Bit
• Program Memory Size: 64KB (64K x 8)
• Peripherals: POR, Voltage Detect, WDT
• Core Processor: R8C
• Speed: 20MHz
• Connectivity: CAN, I²C, LIN, SIO, SSU, UART/USART
• Number Of I /o: 41
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• No. Of I/o's: 41
• Ram Memory Size: 3KB
• Cpu Speed: 20MHz
• No. Of Timers: 4
• Digital Ic Case Style: LQFP
• Embedded Interface Type: CAN, I2C, UART
• Rohs Compliant: Yes
• Cpu Family: R8C
• Device Core Size: 16b
• Frequency (max): 20MHz
• Interface Type: I2C/UART
• Total Internal Ram Size: 3KB
• # I/os (max): 41
• Number Of Timers - General Purpose: 5
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 3V
• On-chip Adc: 12-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 48
• Package Type: LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: RCDK8C - KIT DEV EVAL FOR CAN R8C/23R0K521237S000BE - KIT DEV RSK R8C/23R0E521237CPE00 - EMULATOR COMPACT R8C/20/21/22/23
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

Rev.
0.20
REVISION HISTORY
Jun 28, 2006
Date
57 to 67 7.4 Port Settings added.
Page
41
48
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69
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83
6.1 VCC Input Voltage;
Figure 7.2 Configuration of Programmable I/O Ports (2) revised.
Figure 7.3 Configuration of Programmable I/O Ports (3) revised.
Figure 7.5 Configuration of Programmable I/O Ports (5) revised.
Figure 7.7 Configuration of Programmable I/O Ports (7) revised.
Figure 7.9 PDi (i = 0 to 4 and 6) Registers;
Figure 7.10 Pi (i = 0 to 4 and 6) Registers;
8.1 Processor Modes
9. Bus revised;
Table 9.2 Bus Cycles by Access Space of the R8C/23 Group added.
Table 9.3 Access Unit and Bus Operations;
Figure 10.2 CM0 Register;
Figure 10.4 OCD Register;
Figure 10.5 Registers FRA0 and FRA1;
Figure 10.7 VCA2 Register added.
Figure 10.9 Examples of XIN Clock Connection Circuit;
10.2.2 High-Speed On-Chip Oscillator Clock, on the 3rd and 8th lines;
10.3.5 fOCO40M;
Table 10.2 Settings and Modes of Clock Associated Bits;
R8C/22 Group, R8C/23 Group Hardware Manual
“6.1 Monitoring VCC Input Voltage” → “6.1 VCC Input Voltage”
revised.
NOTE3 added.
P6 Address “00EEh” → “00ECh” corrected.
“8.1 Type of Processor Mode” → “8.1 Processor Modes” revised.
“SFR” → “SFR, data flash”
“ROM/RAM” → “ROM (program ROM), RAM”
below the Table.9.3
“However, only following ~ at a time.” added.
NOTE6 deleted.
“System clock select bet(3)” → “System clock select bet(4)”
“1:Selects on-chip oscillator clock(4)” → “1:Selects on-chip oscillator
clock(3)” corrected.
NOTE2 in the FRA0 register revised.
NOTE revised.
“To use the high-speed ~ (divide-by-4 mode or more).” added.
“Since the difference ~ each bit” → “Since there are ~ individual bits.”
revised.
“fOCO40M can be used with supply voltage VCC = 3.0 to 5.5V.”
added.
“-: can be 0 or 1, no change in outcome.” added.
C - 3
Description
Summary