R5F21238DFP#U0 Renesas Electronics America, R5F21238DFP#U0 Datasheet - Page 153
![IC R8C/23 MCU FLASH 48-LQFP](/photos/12/38/123822/r5f21238dfp_u0_sml.jpg)
R5F21238DFP#U0
Manufacturer Part Number
R5F21238DFP#U0
Description
IC R8C/23 MCU FLASH 48-LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/23r
Specifications of R5F21238DFP#U0
Core Size
16/32-Bit
Program Memory Size
64KB (64K x 8)
Peripherals
POR, Voltage Detect, WDT
Core Processor
R8C
Speed
20MHz
Connectivity
CAN, I²C, LIN, SIO, SSU, UART/USART
Number Of I /o
41
Program Memory Type
FLASH
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
No. Of I/o's
41
Ram Memory Size
3KB
Cpu Speed
20MHz
No. Of Timers
4
Digital Ic Case Style
LQFP
Embedded Interface Type
CAN, I2C, UART
Rohs Compliant
Yes
Cpu Family
R8C
Device Core Size
16b
Frequency (max)
20MHz
Interface Type
I2C/UART
Total Internal Ram Size
3KB
# I/os (max)
41
Number Of Timers - General Purpose
5
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
3V
On-chip Adc
12-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
48
Package Type
LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
RCDK8C - KIT DEV EVAL FOR CAN R8C/23R0K521237S000BE - KIT DEV RSK R8C/23R0E521237CPE00 - EMULATOR COMPACT R8C/20/21/22/23
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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R8C/22 Group, R8C/23 Group
Rev.2.00 Aug 20, 2008
REJ09B0251-0200
Figure 14.2
Timer RA I/O Control Register
Timer RA Control Register
b7 b6 b5 b4
NOTES:
b7 b6 b5 b4 b3 b2
1.
2.
3.
4.
5.
Refer to 14.1.6 Notes on Tim er RA .
When the TSTOP bit is set to 1, bits TSTART and TCSTF and registers TRAPRE and TRA are set to the values after a
reset.
Bits TEDGF and TUNDF can be set to 0 by w riting 0 to these bits by a program. How ever, their value remains
unchanged w hen 1 is w ritten.
In pulse w idth measurement mode and pulse period measurement mode, use the MOV instruction to set the TRACR
register. If it is necessary to avoid changing the values of bits TEDGF and TUNDF, w rite 1 to them.
Set to 0 in timer mode, pulse output mode, and event counter mode.
b3 b2
b1 b0
b1 b0
Registers TRACR and TRAIOC
Bit Symbol
Bit Symbol
TEDGSEL
TSTART
TRAIOC
(b7-b6)
TOENA
TIOSEL
(b7-b6)
Symbol
TRACR
TSTOP
TEDGF
TUNDF
Symbol
TOPCR
TCSTF
TIPF0
TIPF1
Page 131 of 501
(b3)
—
—
—
(4)
TRAIO polarity sw itch bit
TRAIO output control bit
TRAO output enable bit
_____
INT1
TRAIO input filter select bits
Nothing is assigned. If necessary, set to 0.
When read, the content is 0.
Timer RA count start bit
Timer RA count status flag
Timer RA count forcible stop
bit
Nothing is assigned. If necessary, set to 0.
When read, the content is 0.
Active edge reception
flag
Timer RA underflow flag
Nothing is assigned. If necessary, set to 0.
When read, the content is 0.
(2)
(3,5)
/TRAIO select bit
Address
Bit Name
Address
Bit Name
0100h
0101h
(1)
(3,5)
(1)
Function varies depending on operation mode
0 : Stops counting
1 : Starts counting
0 : Stops counting
1 : Counting
When this bit is set to 1, the count is forcibly
stopped. When read, the content is 0.
0 : Active edge not received
1 : Active edge received
0 : No underflow
1 : Underflow
(end of measurement period)
After Reset
After Reset
Function
Function
00h
00h
14. Timers
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RO
—
—
—
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