R5F21238DFP#U0 Renesas Electronics America, R5F21238DFP#U0 Datasheet - Page 176
![IC R8C/23 MCU FLASH 48-LQFP](/photos/12/38/123822/r5f21238dfp_u0_sml.jpg)
R5F21238DFP#U0
Manufacturer Part Number
R5F21238DFP#U0
Description
IC R8C/23 MCU FLASH 48-LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/23r
Specifications of R5F21238DFP#U0
Core Size
16/32-Bit
Program Memory Size
64KB (64K x 8)
Peripherals
POR, Voltage Detect, WDT
Core Processor
R8C
Speed
20MHz
Connectivity
CAN, I²C, LIN, SIO, SSU, UART/USART
Number Of I /o
41
Program Memory Type
FLASH
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
No. Of I/o's
41
Ram Memory Size
3KB
Cpu Speed
20MHz
No. Of Timers
4
Digital Ic Case Style
LQFP
Embedded Interface Type
CAN, I2C, UART
Rohs Compliant
Yes
Cpu Family
R8C
Device Core Size
16b
Frequency (max)
20MHz
Interface Type
I2C/UART
Total Internal Ram Size
3KB
# I/os (max)
41
Number Of Timers - General Purpose
5
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
3V
On-chip Adc
12-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
48
Package Type
LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
RCDK8C - KIT DEV EVAL FOR CAN R8C/23R0K521237S000BE - KIT DEV RSK R8C/23R0E521237CPE00 - EMULATOR COMPACT R8C/20/21/22/23
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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R8C/22 Group, R8C/23 Group
Rev.2.00 Aug 20, 2008
REJ09B0251-0200
14.2.2
Table 14.8
NOTES:
Count Sources
Count Operations
Width and Period of
Output Waveform
Count Start Condition Write 1 (count start) to the TSTART bit in the TRBCR register
Count Stop
Conditions
Interrupt Request
Generation Timing
TRBO Pin Function
INT0 Pin Function
Read from Timer
Write to Timer
Select Functions
1. Even when counting the secondary period, read out the TRBPR register.
2. The set values are reflected to the waveform output beginning with the following primary period after
3. The value written to the TOCNT bit is enabled by the following.
Programmable waveform generation mode is mode to invert the signal output from the TRBO pin each time the
counter underflows, while the values in the TRBPR and TRBSC registers are counted alternately (see Table
14.8 Programmable Waveform Generation Mode Specifications). A counting starts by counting the setting
value in the TRBPR register. The TRBOCR register is unused in this mode.
Figure 14.19 shows the TRBIOC Register in Programmable Waveform Generation Mode. Figure 14.20 shows
the Operation Example of Timer RB in Programmable Waveform Generation Mode.
writing to the TRBPR register.
•
•
When count starts.
When the timer RB interrupt request is generated.
The contents after the TOCNT bit is changed are reflected from the output of the following
primary period.
Item
Programmable Waveform Generation Mode
Programmable Waveform Generation Mode Specifications
Page 154 of 501
f1, f2, f8, timer RA underflow
• Decrement
• When the timer underflows, it reloads the contents of the primary reload and
Primary period: (n+1)(m+1)/fi
Secondary period: (n+1)(p+1)/fi
Period: (n+1){(m+1)+(p+1)}/fi
fi: Count source frequency
n: Setting value in TRBPRE register
m: Setting value in TRBPR register
p: Setting value in TRBSC register
• Write 0 (count stop) to the TSTART bit in the TRBCR register
• Write 1 (count forcibly stop) to the TSTOP bit in the TRBCR register
In half of count source, after timer RB underflows during secondary period (at the
same time as the TRBO output change) [timer RB interrupt]
Programmable output port or pulse output
Programmable I/O port or INT0 interrupt input
The count value can be read out by reading the TRBPR and TRBPRE registers
• When registers TRBPRE, TRBSC, and TRBPR are written while the count is
• When registers TRBPRE, TRBSC, and TRBPR are written to during count
• Output level select function
• TRBO pin output switch function
secondary reload registers alternately before the count continues.
stopped, values are written to both the reload register and counter.
operation, values are written to the reload registers only.
The TOPL bit can select the output level during primary and secondary periods.
Timer RB pulse output or P3_1 latch output is selected by the TOCNT bit in the
TRBIOC register.
(3)
Specification
(2)
14. Timers
(1)
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