DF2372RVFQ34V Renesas Electronics America, DF2372RVFQ34V Datasheet - Page 316

• Manufacturer Part Number: DF2372RVFQ34V
• Description: IC H8S/2372 MCU FLASH 144LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2372RVFQ34V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 34MHz
• Connectivity: I²C, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 6x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• For Use With: YLCDRSK2378 - KIT DEV EVAL H8S/2378 LCDYR0K42378FC000BA - KIT EVAL FOR H8S/2378HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 6 Bus Controller (BSC)
6.8.2
As with the basic bus interface, either program wait insertion or pin wait insertion using the WAIT
pin can be used in the initial cycle (full access) on the burst ROM interface. See section 6.5.4,
Wait Control. Wait states cannot be inserted in a burst cycle.
6.8.3
When a write access to burst ROM space is executed, burst access is interrupted at that point and
the write access is executed in line with the basic bus interface settings. Write accesses are not
performed in burst mode even though burst ROM space is designated.
Rev.7.00 Mar. 18, 2009 page 248 of 1136
REJ09B0109-0700
Wait Control
Write Access
Upper address bus
Lower address bus
Figure 6.64 Example of Burst ROM Access Timing
Note: n = 1 and 0
Data bus
CSn
RD
AS
(ASTn = 0, 1-State Burst Cycle)
φ
T
1
Full access
T
2
T
Burst access
1
T
1