DF2372RVFQ34V Renesas Electronics America, DF2372RVFQ34V Datasheet - Page 704

• Manufacturer Part Number: DF2372RVFQ34V
• Description: IC H8S/2372 MCU FLASH 144LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2372RVFQ34V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 34MHz
• Connectivity: I²C, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 6x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• For Use With: YLCDRSK2378 - KIT DEV EVAL H8S/2378 LCDYR0K42378FC000BA - KIT EVAL FOR H8S/2378HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 12 Programmable Pulse Generator (PPG)
NDRH
If pulse output groups 2 and 3 have the same output trigger, all eight bits are mapped to the same
address and can be accessed at one time, as shown below.
Bit
7
6
5
4
3
2
1
0
If pulse output groups 2 and 3 have different output triggers, upper 4 bits and lower 4 bits are
mapped to the different addresses as shown below.
Bit
7
6
5
4
3
to
0
Bit
7
to
4
3
2
1
0
Rev.7.00 Mar. 18, 2009 page 636 of 1136
REJ09B0109-0700
Bit Name
NDR15
NDR14
NDR13
NDR12
NDR11
NDR10
NDR9
NDR8
Bit Name
NDR15
NDR14
NDR13
NDR12
—
Bit Name
—
NDR11
NDR10
NDR9
NDR8
Initial Value
0
0
0
0
0
0
0
0
Initial Value
0
0
0
0
All 1
Initial Value
All 1
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
—
R/W
—
R/W
R/W
R/W
R/W
Description
Next Data Register 15 to 8
The register contents are transferred to the
corresponding PODRH bits by the output trigger
specified with PCR.
Description
Next Data Register 15 to 12
The register contents are transferred to the
corresponding PODRH bits by the output trigger
specified with PCR.
Reserved
1 is always read and write is disabled.
Description
Reserved
1 is always read and write is disabled.
Next Data Register 11 to 8
The register contents are transferred to the
corresponding PODRH bits by the output trigger
specified with PCR.