UPD78F1001GA-HAA-AX Renesas Electronics America, UPD78F1001GA-HAA-AX Datasheet - Page 168

• Manufacturer Part Number: UPD78F1001GA-HAA-AX
• Description: MCU 16BIT 78K0R/KX3-L 44-TQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3-Lr

Specifications of UPD78F1001GA-HAA-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Kx3-L
Address Special Function Register (SFR) Name
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
F00F3H Operation speed mode control
F00F4H Regulator mode control register RMC
F00F6H 20 MHz internal high-speed
F00FEH BCD adjust result register
F0100H
F0101H
F0102H
F0103H
F0104H
F0105H
F0106H
F0107H
F0108H
F0109H
F010AH
F010BH
F010CH
F010DH
F010EH
F010FH
F0110H
F0111H
F0112H
F0113H
F0114H
F0115H
F0116H
F0117H
F0118H
F0119H
F011AH
F011BH
F011CH
F011DH
F011EH
F011FH
register
oscillation control register
Serial status register 00
Serial status register 01
Serial status register 02
Serial status register 03
Serial flag clear trigger register
00
Serial flag clear trigger register
01
Serial flag clear trigger register
02
Serial flag clear trigger register
03
Serial mode register 00
Serial mode register 01
Serial mode register 02
Serial mode register 03
Serial communication operation
setting register 00
Serial communication operation
setting register 01
Serial communication operation
setting register 02
Serial communication operation
setting register 03
Table 4-6. Extended SFR (2nd SFR) List (2/8)
SSR00L
SSR01L
SSR02L
SSR03L
OSMC
DSCCTL
BCDADJ
SIR00L
SIR01L
SIR02L
SIR03L
SMR00
SMR01
SMR02
SMR03
SCR00
SCR01
SCR02
SCR03
−
−
−
−
−
−
−
−
Symbol
SSR00
SSR01
SSR02
SSR03
SIR00 R/W
SIR01 R/W
SIR02 R/W
SIR03 R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
R
R
R
Manipulable Bit Range
1-bit
−
−
√
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
8-bit
√
√
√
√
√
−
√
−
√
−
√
−
√
−
√
−
√
−
√
−
−
−
−
−
−
−
−
−
16-bit
−
−
−
−
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
CHAPTER 4 CPU ARCHITECTURE
After Reset
Undefined
0000H
0000H
0000H
0000H
0000H
0000H
0000H
0000H
0020H
0020H
0020H
0020H
0087H
0087H
0087H
0087H
00H
00H
00H
√
√
√
√
√
√
√
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168
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