UPD78F1001GA-HAA-AX Renesas Electronics America, UPD78F1001GA-HAA-AX Datasheet - Page 966

• Manufacturer Part Number: UPD78F1001GA-HAA-AX
• Description: MCU 16BIT 78K0R/KX3-L 44-TQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3-Lr

Specifications of UPD78F1001GA-HAA-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Kx3-L
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
Address: 000C0H/010C0H
Address: 000C1H/010C1H
Notes 1.
Caution The watchdog timer continues its operation during self-programming of the flash memory and
Remark f
Notes 1.
(Cautions are listed on the next page.)
2.
2.
3.
WDSTBYON
EEPROM emulation. During processing, the interrupt acknowledge time is delayed. Set the overflow
time and window size taking this delay into consideration.
IL
FRQSEL2
Set the same value as 000C0H to 010C0H when the boot swap operation is used because 000C0H is
replaced by 010C0H.
The window open period is 100% when WDSTBYON = 0, regardless the value of the WINDOW1 and
WINDOW0 bits.
Set the same value as 000C1H to 010C1H when the boot swap operation is used because 000C1H is
replaced by 010C1H.
When 8 MHz or 20 MHz has been selected, the 8 MHz internal high-speed oscillator automatically starts
oscillating after reset release.
microcontroller, oscillation is started by setting bit 0 (DSCON) of the 20 MHz internal high-speed oscillation
control register (DSCCTL) to 1 with V
speed oscillator while the microcontroller operates.
When 1 MHz has been selected, the microcontroller operates on the 1 MHz internal high-speed oscillator
after reset release. The circuit cannot be changed to an 8 MHz or 20 MHz internal high-speed oscillator
while the microcontroller operates.
WDTINIT
: Internal low-speed oscillation clock frequency
LVIOFF
Other than the above
7
0
1
7
0
1
1
0
1
Note 1
Note 1
Counter operation stopped in HALT/STOP mode
Counter operation enabled in HALT/STOP mode
LVI is ON by default (LVI default start function enabled) upon reset release (upon power
application)
LVI is OFF by default (LVI default start function stopped) upon reset release (upon power
application)
Figure 25-1. Format of User Option Byte (000C0H/010C0H) (2/2)
WINDOW1
FRQSEL1
Figure 25-2. Format of User Option Byte (000C1H/010C1H)
6
6
1
1
0
8 MHz/20 MHz
1 MHz
Setting prohibited
WINDOW0
Operation control of watchdog timer counter (HALT/STOP mode)
5
5
1
Note 3
To use the 20 MHz internal high-speed oscillator to operate the
DD
Note 2
WDTON
Setting of LVI on power application
≥ 2.7 V. The circuit cannot be changed to a 1 MHz internal high-
4
4
1
Internal high-speed oscillator frequency
WDCS2
Note 2
3
3
1
FRQSEL2
WDCS1
2
2
CHAPTER 25 OPTION BYTE
FRQSEL1
WDCS0
1
1
WDSTBYON
LVIOFF
0
0
966