UPD78F1001GA-HAA-AX Renesas Electronics America, UPD78F1001GA-HAA-AX Datasheet - Page 684

• Manufacturer Part Number: UPD78F1001GA-HAA-AX
• Description: MCU 16BIT 78K0R/KX3-L 44-TQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3-Lr

Specifications of UPD78F1001GA-HAA-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Kx3-L
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
Figure 14-73. Flowchart of Slave Transmission/Reception (in Continuous Transmission/Reception Mode)
Cautions 1.
Remark
<1> Select the buffer empty interrupt.
<1> to <8> in the figure correspond to <1> to <8> in Figure 14-72
Transmission/Reception (in Continuous Transmission/Reception Mode).
2.
Writing 1 to the MDmn0 bit
After setting the SAUmEN bit of peripheral enable register 0/1 (PER0/PER1) to 1, be sure to
set serial clock select register m (SPSm) after 4 or more f
Be sure to set transmit data to the SlOp register before the clock from the master is started.
<3>
<6>
Yes
No
<2>
<4>
<5>
<7>
<8>
SMRmn, SCRmn:
SDRmn[15:9]:
SOm, SOEm:
Clearing 0 to the MDmn0 bit
Clearing the SAUmEN bit of the
Setting the SAUmEN bit of the
Setting transfer rate by the
Writing 1 to the SSmn bit
Starting CSI communication
Writing 1 to the STmn bit
Reading receive data to
Reading receive data to
Writing transmit data to
Communication continued?
End of communication
PER0/PER1 register to 1
PER0/PER1 register to 0
SIOp (=SDRmn[7:0])
SIOp (=SDRmn[7:0])
SIOp (=SDRmn[7:0])
Communication data
Port manipulation
Buffer empty interrupt
Transfer end interrupt
SPSm register
No
TSFmn = 1?
Yes
Yes
generated?
generated?
exists?
Setting communication
Setting 0000000B
Setting output
Yes
No
No
No
Yes
Specify the initial settings while the
SEmn bit of serial channel enable status
register m (SEm) is 0 (operation is
stopped).
CHAPTER 14 SERIAL ARRAY UNIT
CLK
clocks have elapsed.
Timing Chart of Slave
684