UPD78F1001GA-HAA-AX Renesas Electronics America, UPD78F1001GA-HAA-AX Datasheet - Page 738

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UPD78F1001GA-HAA-AX

Manufacturer Part Number
UPD78F1001GA-HAA-AX
Description
MCU 16BIT 78K0R/KX3-L 44-TQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3-Lr
Datasheet

Specifications of UPD78F1001GA-HAA-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F1001GA-HAA-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
78K0R/Kx3-L
14.8.4 Stop condition generation
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
After all data are transmitted to or received from the target slave, a stop condition is generated and the bus is released.
(1) Processing flow
Note During a receive operation, the SOEmn bit of serial output enable register m (SOEm) is cleared to 0 before
SDAr output
SCLr output
receiving the last data.
SOEmn
SEmn
STmn
Note
Figure 14-108. Timing Chart of Stop Condition Generation
Figure 14-109. Flowchart of Stop Condition Generation
Operation
stop
Writing 1 to the STmn bit to clear
Starting generation of stop condition.
transmission/data reception
Writing 0 to the SOEmn bit
Writing 1 to the CKOmn bit
(the SEmn bit is cleared to 0)
Writing 0 to the SOmn bit
Writing 1 to the SOmn bit
End of IIC communication
Completion of data
SOmn
bit manipulation
Wait
Stop condition
CKOmn
bit manipulation
Operation is stopped
Secure a wait time so that the specifications of
I
2
SOmn
bit manipulation
C on the slave side are satisfied.
CHAPTER 14 SERIAL ARRAY UNIT
738

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