UPD78F1001GA-HAA-AX Renesas Electronics America, UPD78F1001GA-HAA-AX Datasheet - Page 447

• Manufacturer Part Number: UPD78F1001GA-HAA-AX
• Description: MCU 16BIT 78K0R/KX3-L 44-TQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3-Lr

Specifications of UPD78F1001GA-HAA-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Kx3-L
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
(1) When CKm0 or CKm1 is selected as count clock
TMRmn
Figure 8-43. Example of Set Contents of Registers During Operation as Interval Timer/Square Wave Output (1/3)
TOMm
TOEm
TOLm
TOm
(b) Timer output register m (TOm)
(c) Timer output enable register m (TOEm)
(d) Timer output level register m (TOLm)
(e) Timer output mode register m (TOMm)
Remark m: Unit number (m = 0, 1), n: Channel number (n = 0 to 7)
(a) Timer mode register mn (TMRmn)
TOMmn
TOEmn
CKSmn
TOLmn
TOmn
Bit n
Bit n
Bit n
Bit n
1/0
1/0
1/0
15
0
0
However, in case of the operation of square wave output and the timer output pin (TOmn), mn changes as
below.
78K0R/KC3-L (40-pin):
78K0R/KC3-L (44-pin, 48-pin):
78K0R/KD3-L, 78K0R/KE3-L:
78K0R/KF3-L, 78K0R/KG3-L:
Selecting the operation clock from two types of clocks (f
14
0: Selects CKm0 as operation clock of channel n.
1: Selects CKm1 as operation clock of channel n.
0
0: Outputs 0 from TOmn.
1: Outputs 1 from TOmn.
0: Stops the TOmn output operation by counting operation.
1: Enables the TOmn output operation by counting operation.
0: Cleared to 0 when TOMmn = 0 (master channel output mode)
0: Sets master channel output mode.
13
0
CCSmn
12
0
Count clock selection
TERmn
MAS
0: Selects the operation clock specified by using the CKSmn bit (f
11
0
Slave/master selection
STSmn2
10
0: Independent channel operation function.
0
STSmn1
0
9
mn = 02 to 07
mn = 00 to 07
mn = 00 to 07
mn = 00 to 07, 10 to 13
Start trigger selection
STSmn0
000B: Selects only software start.
8
0
CISmn1
7
0
MCK
CISmn0
)
6
0
Selection of TImn pin input edge
00B: Sets 00B because these are not used.
Operation mode of channel n
000B: Interval timer
5
0
Setting of operation when counting is started
CHAPTER 8 TIMER ARRAY UNIT
0: Neither generates INTTMmn nor inverts
1: Generates INTTMmn and inverts timer
timer output when counting is started.
output when counting is started.
4
0
MDmn3
3
0
MDmn2
2
0
MCK
) as the count clock.
MDmn1
1
0
MDmn0
1/0
0
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