UPD78F1001GA-HAA-AX Renesas Electronics America, UPD78F1001GA-HAA-AX Datasheet - Page 524

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UPD78F1001GA-HAA-AX

Manufacturer Part Number
UPD78F1001GA-HAA-AX
Description
MCU 16BIT 78K0R/KX3-L 44-TQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3-Lr
Datasheet

Specifications of UPD78F1001GA-HAA-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F1001GA-HAA-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
78K0R/Kx3-L CHAPTER 10 COMPARATORS/PROGRAMMABLE GAIN AMPLIFIERS (78K0R/KC3-L, KD3-L, KE3-L only)
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
(1) Peripheral enable register 1 (PER1)
This register is used to enable or disable supplying the clock to the peripheral hardware. Power consumption and
noise are reduced by stopping the clock supply to unused hardware.
Make sure to set bit 3 (OACMPEN) to 1 to use a comparator or a programmable gain amplifier.
The PER1 register can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears this register to 00H.
Cautions 1. Make sure to set the OACMPEN bit to 1 first, when setting the comparator or programmable
Address: F00F1H After reset: 00H R/W
Symbol
PER1
2. Make sure to set bits 0 to 2 and bits 4 to 7 of the PER1 register to “0”.
OACMPEN
gain amplifier.
amplifier will be ignored and all values read will be initialized when the OACMPEN bit is set to
0.
0
1
7
0
Figure 10-3. Format of Peripheral Enable Register 1 (PER1)
Stops input clock supply.
• SFR used by the comparator and programmable gain amplifier cannot be written.
• The comparator and programmable gain amplifier is in the reset status.
Enables input clock supply.
• SFR used by the comparator and programmable gain amplifier can be read and written.
6
0
Control of comparator and programmable gain amplifier input clock supply
Writing to the control register of the comparator or programmable gain
5
0
4
0
OACMPEN
<3>
2
0
1
0
0
0
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