BGW200EG/01,515 NXP Semiconductors, BGW200EG/01,515 Datasheet - Page 14

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BGW200EG/01,515

Manufacturer Part Number
BGW200EG/01,515
Description
IC WLAN SIP MOD 802.11B 68HVQFN
Manufacturer
NXP Semiconductors
Series
BGW200r
Datasheet

Specifications of BGW200EG/01,515

Frequency
2.4GHz ~ 2.5GHz
Modulation Or Protocol
DBPSK, DQPSK, CCK
Applications
PDA's, Portable Audio/Video, Smartphones
Power - Output
8dBm ~ 18dBm
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Package / Case
68-VQFN Exposed Pad, 68-HVQFN, 68-SQFN, 68-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Supply
-
Operating Temperature
-
Sensitivity
-
Memory Size
-
Data Rate - Maximum
-
Current - Transmitting
-
Current - Receiving
-
Other names
568-4015-2
935279198515
BGW200EG/01-G
NXP Semiconductors
BGW200EG_1
Product data sheet
The SA2443A has five reset sources:
A power-on reset signal is generated when the core supply voltage is applied. The reset
signal remains active for 4 ms after the 1.8 V supply is stable. The signal is available on
pin POR_N. The RST_N pin should be linked to the POR_N pin; use of an external reset
signal is not supported.
The MODE0 and MODE1 pins are used to control the boot mode of the SA2443A as
shown in
Table 4.
The SPI embedded boot mode is used when the WLAN solution is embedded in an
application, such as a cellular phone or PDA. In this case, the SA2443A firmware will be
downloaded from the host processor via the high-speed SPI slave interface (SPI2).
The SPI flash mode is used primarily for firmware development and debugging. In this
mode, firmware is read from a serial flash memory connected to the master/slave SPI
interface (SPI1).
The SDIO embedded mode operates in the same way as the SPI embedded mode,
except that code is downloaded from the SDIO interface.
MODE0
L
H
L
H
External reset (pin RST_N)
Watchdog timer reset
Firmware reset
SPI2 reset
SDIO reset
Table
MODE1
L
L
H
H
SA2443A boot modes
4.
Boot mode
SPI embedded
SPI flash
SDIO embedded firmware download from the host via SDIO
reserved
Rev. 01 — 18 July 2007
Description
firmware download from the host via SPI2 44 MHz
firmware read from a serial flash via SPI1
-
IEEE 802.11b System-in-Package
BGW200EG
© NXP B.V. 2007. All rights reserved.
Boot clock
-
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