BGW200EG/01,515 NXP Semiconductors, BGW200EG/01,515 Datasheet - Page 6

• Manufacturer Part Number: BGW200EG/01,515
• Description: IC WLAN SIP MOD 802.11B 68HVQFN
• Manufacturer: NXP Semiconductors
• Series: BGW200r

Specifications of BGW200EG/01,515

• Frequency: 2.4GHz ~ 2.5GHz
• Modulation Or Protocol: DBPSK, DQPSK, CCK
• Applications: PDA's, Portable Audio/Video, Smartphones
• Power - Output: 8dBm ~ 18dBm
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Package / Case: 68-VQFN Exposed Pad, 68-HVQFN, 68-SQFN, 68-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Supply: -
• Operating Temperature: -
• Sensitivity: -
• Memory Size: -
• Data Rate - Maximum: -
• Current - Transmitting: -
• Current - Receiving: -
• Other names: 568-4015-2; 935279198515; BGW200EG/01-G

NXP Semiconductors
Table 2.
BGW200EG_1
Product data sheet
Symbol
SPI interface
SPI_SCK
SPI_SS_N
SPI_EXT_INT
SPI_MISO
SPI_MOSI
SDIO Interface
SD_CLK
SD_CMD
SD_DAT0
SD_DAT1
SD_DAT2
SD_DAT3
UART interface
UART_RX
UART_TX
Antenna RF ports
ANT_MAIN
ANT_AUX
Test pins
TEST_RSSI
TEST_LOCK
TEST_TXRX
TEST_SDATA
Pin description
6.2 Pin description
Pin
25
27
24
26
28
37
36
38
39
34
35
40
41
55
57
3
8
53
63
Type
I/O; I
I; I/O
O; I/O
I/O
I/O
I; I
I/O
I/O
I/O
I/O
I/O
I; I/O
O; I/O
I/O
I
O
O
O
I/O
Circuit
3-state; 3 ns slew rate;
4 mA; CMOS; hysteresis
3-state; 3 ns slew rate;
4 mA; CMOS; hysteresis
3-state; 3 ns slew rate;
4 mA; CMOS; hysteresis
3-state; 3 ns slew rate;
4 mA; CMOS; hysteresis
3-state; 1 ns slew rate;
4 mA; CMOS
CMOS; hysteresis
3-state; 1 ns slew rate;
4 mA; CMOS
3-state; 1 ns slew rate;
4 mA; CMOS
3-state; 1 ns slew rate;
4 mA; CMOS
3-state; 1 ns slew rate;
4 mA; CMOS
3-state; 1 ns slew rate;
4 mA; CMOS
3-state; 3 ns slew rate;
4 mA; CMOS; hysteresis
3-state; 3 ns slew rate;
4 mA; CMOS; hysteresis
analog
analog
analog; C
CMOS; 4.5 mA
push-pull; 3 ns slew rate;
4 mA
3-state; 3 ns slew rate;
4 mA; CMOS; hysteresis
L
= 100 pF
Rev. 01 — 18 July 2007
Reset
I, pull-down V
I, pull-down V
I, pull-down V
I, pull-down V
I, pull-down V
-
I
I
I
I
I, pull-up
I, pull-down V
I, pull-down V
-
-
LOW
LOW
LOW
I, pull-down V
[1]
Supply
V
V
V
V
V
V
-
-
V
V
V
or V
DDD(IO)
DDD(IO)
DDD(IO)
DDD(IO)
DDD(IO)
DDD(IO)
DDD(IO)
DDD(IO)
DDD(IO)
DDD(IO)
DDD(IO)
DDD(IO)
DDD(IO)
DDA(RF)
DDA
DDD(IO)
DDD(IO)
DDA
IEEE 802.11b System-in-Package
Description
SPI clock; bidirectional; 32 kHz
sleep clock input
SPI slave select input;
general-purpose I/O bit 6;
bidirectional
SPI external interrupt output;
general-purpose I/O bit 5;
bidirectional
SPI data (master in / slave out);
bidirectional
SPI data (master out / slave in);
bidirectional
SD clock input; 32 kHz clock
input
SD command; bidirectional
SD data bit 0; bidirectional
SD data bit 1; bidirectional
SD data bit 2; bidirectional
SD data bit 3; bidirectional
UART receive input;
general-purpose I/O bit 7;
bidirectional
UART transmit output;
general-purpose I/O bit 8;
bidirectional
RF main antenna port; 50
RF auxiliary antenna port; 50
test pin for RF RSSI signal
output
test pin for synthesizer lock
indicator
test pin for RF transmit/receive
select signal
test pin for 3-wire bus data;
bidirectional
BGW200EG
© NXP B.V. 2007. All rights reserved.
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