BGW200EG/01,515 NXP Semiconductors, BGW200EG/01,515 Datasheet - Page 33

• Manufacturer Part Number: BGW200EG/01,515
• Description: IC WLAN SIP MOD 802.11B 68HVQFN
• Manufacturer: NXP Semiconductors
• Series: BGW200r

Specifications of BGW200EG/01,515

• Frequency: 2.4GHz ~ 2.5GHz
• Modulation Or Protocol: DBPSK, DQPSK, CCK
• Applications: PDA's, Portable Audio/Video, Smartphones
• Power - Output: 8dBm ~ 18dBm
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Package / Case: 68-VQFN Exposed Pad, 68-HVQFN, 68-SQFN, 68-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Supply: -
• Operating Temperature: -
• Sensitivity: -
• Memory Size: -
• Data Rate - Maximum: -
• Current - Transmitting: -
• Current - Receiving: -
• Other names: 568-4015-2; 935279198515; BGW200EG/01-G

NXP Semiconductors
Table 20.
Legend: * reset value
[1]
[2]
Table 21.
Legend: * reset value
[1]
Table 22.
Legend: * reset value
[1]
[2]
Table 23.
Legend: * reset value
[1]
Table 24.
Legend: * reset value
BGW200EG_1
Product data sheet
Bit
7 to 0
Bit
7 to 0
Bit
7 to 0
Bit
7 to 0
Bit
7 to 3
2
1
Register definition is the same for all local mailboxes; replace n with the mailbox number (0 to 3).
Writing to this register generates an interrupt to the local microcontroller if bit LMBn_INT_EN is set in register SPI2_LOC_ISCR (see
Table
Register definition is the same for all local scratch registers; replace n with the scratch register number (0 to 3).
Register definition is the same for all host mailboxes; replace n with the mailbox number (0 to 3).
Writing to this register generates an interrupt to the SPI host if bit HMBn_INT_EN is set in register SPI2_HST_ISCR; see
host read clears the interrupt.
Register definition is the same for all host scratch registers; replace n with the scratch register number (0 to 3).
17). A local read clears the interrupt.
Symbol
MBOX_DATA[7:0]
Symbol
SCRCH_DATA[7:0]
Symbol
MBOX_DATA[7:0]
Symbol
SCRCH_DATA[7:0]
Symbol
-
SPI2_HOST_RST
SPI2_SLAVE_RST
SPI2_LOC_MBn
SPI2_LOC_SRn
SPI2_HST_MBn
SPI2_HST_SRn
SPI2_RST_CR register - SPI2 reset control (19h)
[1]
[1]
[1]
[1]
register - SPI2 host scratch register n (14h to 17h)
register - SPI2 local scratch register n (0Ah to 0Dh)
register - SPI2 host mailbox n (Fh to 12h)
register - SPI2 local mailbox n (05h to 08h)
Access
Local
R
Access
Local
R
Access
Local
R/W
Access
Local
R/W
Access
Local
R
R/W
R/W
[2]
Host
R/W
Host
R/W
Host
R
Host
R
Host
R
R
R
[2]
Rev. 01 — 18 July 2007
Value
00h*
Value
00h*
Value
00h*
Value
00h*
Value
00h*
0*
1
0*
1
Description
mailbox data
Description
scratch data
Description
mailbox data
Description
scratch data
Description
reserved
SPI2 interface host side reset status
SPI2 interface host side operational
SPI2 interface host side reset ongoing
SPI2 interface slave side reset status
SPI2 interface slave side operational
SPI2 interface slave side reset ongoing
IEEE 802.11b System-in-Package
BGW200EG
© NXP B.V. 2007. All rights reserved.
Table
33 of 76
18. A