BGW200EG/01,515 NXP Semiconductors, BGW200EG/01,515 Datasheet - Page 41

• Manufacturer Part Number: BGW200EG/01,515
• Description: IC WLAN SIP MOD 802.11B 68HVQFN
• Manufacturer: NXP Semiconductors
• Series: BGW200r

Specifications of BGW200EG/01,515

• Frequency: 2.4GHz ~ 2.5GHz
• Modulation Or Protocol: DBPSK, DQPSK, CCK
• Applications: PDA's, Portable Audio/Video, Smartphones
• Power - Output: 8dBm ~ 18dBm
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Package / Case: 68-VQFN Exposed Pad, 68-HVQFN, 68-SQFN, 68-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Supply: -
• Operating Temperature: -
• Sensitivity: -
• Memory Size: -
• Data Rate - Maximum: -
• Current - Transmitting: -
• Current - Receiving: -
• Other names: 568-4015-2; 935279198515; BGW200EG/01-G

NXP Semiconductors
Table 35.
Legend: * reset value
Table 36.
Legend: * reset value
Table 37.
Legend: * reset value
BGW200EG_1
Product data sheet
Bit
5
4
3
2
1
0
Bit
23 to 0
Bit
7 to 2
1
Symbol
E4MI
S4MI
SBS
SRW
SMB
SDC
Symbol
CCIS_PTR[23:0]
Symbol
-
BR
SD_CAPABILITY register - SDIO card capability (FN0 0 0008h)
SD_CCIS_PTR register - SDIO common CIS pointer (FN0 0 0009h)
SD_BUS_STAT register - SDIO bus status (FN0 0 000Ch)
Access
Local
R/W
R/W
R/W
R/W
R/W
R/W
Access
Local
R/W
Access
Local
-
-
Host
R/W
R
R
R
R
R
Host
R
Host
-
R/W
Rev. 01 — 18 July 2007
Value
0
1*
0
1*
0
1*
0
1*
0
1*
0
1*
Value
00 1000h* pointer to the start of the common CIS area
Value
-
0*
1
Description
4-bit mode inter-block interrupt control
do not generate interrupts during 4-bit multiblock
data transfers
generate interrupts during 4-bit multiblock data
transfers
4-bit mode inter-block interrupt support
card cannot generate interrupts during 4-bit
multiblock data transfers
card can generate interrupts during 4-bit multiblock
data transfers
suspend and resume support
suspend and resume not supported
suspend and resume supported
read wait control support
read wait control not supported
read wait control supported
multiblock mode support
multiblock mode not supported
multiblock mode supported
direct command support
direct command during data transfer not supported
direct command during data transfer supported
Description
Description
reserved
bus release request status and control. For SPI
mode this bit is read-only and will always return to
logic 0.
cancel a pending suspension request
suspend addressed function. Bits BR and BS will
be cleared when the addressed function has
executed the suspend command.
…continued
IEEE 802.11b System-in-Package
BGW200EG
© NXP B.V. 2007. All rights reserved.
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