BGW200EG/01,515 NXP Semiconductors, BGW200EG/01,515 Datasheet - Page 15

• Manufacturer Part Number: BGW200EG/01,515
• Description: IC WLAN SIP MOD 802.11B 68HVQFN
• Manufacturer: NXP Semiconductors
• Series: BGW200r

Specifications of BGW200EG/01,515

• Frequency: 2.4GHz ~ 2.5GHz
• Modulation Or Protocol: DBPSK, DQPSK, CCK
• Applications: PDA's, Portable Audio/Video, Smartphones
• Power - Output: 8dBm ~ 18dBm
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Package / Case: 68-VQFN Exposed Pad, 68-HVQFN, 68-SQFN, 68-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Supply: -
• Operating Temperature: -
• Sensitivity: -
• Memory Size: -
• Data Rate - Maximum: -
• Current - Transmitting: -
• Current - Receiving: -
• Other names: 568-4015-2; 935279198515; BGW200EG/01-G

NXP Semiconductors
BGW200EG_1
Product data sheet
10.2 Microcontroller subsystem
The microcontroller subsystem is based around an ARM7TDMI-S RISC controller and has
the following features:
Fig 5. Block diagram of the microcontroller subsystem
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•
•
•
•
•
Embedded nonvolatile memory: 256-kbit ROM
Embedded volatile memory: 5
Instruction pre-fetch unit for enhanced microcontroller performance
Two high-performance AHB buses for optimized throughput:
– AHB1 is a multimaster bus used for DMA transfers
– AHB2 is a single-master bus used by the microcontroller
VPB bus for lower-speed peripherals
JTAG-compliant interface for ARM7 in-circuit emulation (enabled by pulling the
DEBUG_EN pin HIGH)
AND INSTRUCTION
AHB-1 ADDRESS
AHB INTERFACE
8 kbit
8 kbit
8 kbit
AHB-1 ARBITER
PRE-FETCH
DECODER
32 SRAM
32 SRAM
32 SRAM
Rev. 01 — 18 July 2007
M
U
M
U
M
U
X
X
X
ARM7TDMI-S
RISC CORE
JTAG
256-kbit SRAM
M
M
M
U
X
U
X
U
X
AHB-2 ADDRESS
8 kbit
8 kbit
8 kbit
AHB TO VPB
DECODER
BRIDGE
IEEE 802.11b System-in-Package
32 SRAM
32 SRAM
32 ROM
BGW200EG
001aad190
AHB-2
© NXP B.V. 2007. All rights reserved.
VPB
AHB-1
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