IPR-FIR Altera, IPR-FIR Datasheet - Page 17

• Manufacturer Part Number: IPR-FIR
• Description: IP CORE Renewal Of IP-FIR
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IPR-FIR

• Software Application: IP CORE, DSP Filters And Transforms
• Supported Families: Arria GX, Arria II GX, Cyclone, HardCopy, Stratix
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Function: Finite Impulse Response Compiler
• License: Renewal License
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

Chapter 2: Getting Started
MegaWizard Plug-In Manager Flow
Figure 2–2. Selecting the MegaCore Function
Parameterize the MegaCore Function
© December 2010 Altera Corporation
4. Verify that the device family is the same as you specified in the New Project
5. Select the top-level output file type for your design; the wizard supports VHDL
6. Specify the top level output file name for your MegaCore function variation and
To parameterize your MegaCore function variation, perform the following steps:
1. Click Step 1: Parameterize in IP Toolbench to display the Parameterize - FIR
Wizard.
and Verilog HDL.
click Next to launch IP Toolbench
Compiler window. Use this interface to specify the required parameters for the
MegaCore function variation. For an example of how to set parameters for the FIR
Compiler MegaCore function, refer to
(Figure 2–3 on page
Chapter 3, Parameter
2–4).
Settings.
FIR Compiler User Guide
2–3