IPR-FIR Altera, IPR-FIR Datasheet - Page 47

• Manufacturer Part Number: IPR-FIR
• Description: IP CORE Renewal Of IP-FIR
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IPR-FIR

• Software Application: IP CORE, DSP Filters And Transforms
• Supported Families: Arria GX, Arria II GX, Cyclone, HardCopy, Stratix
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Function: Finite Impulse Response Compiler
• License: Renewal License
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

Chapter 4: Functional Description
FIR Compiler
© December 2010 Altera Corporation
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For example:
coef_seq.exe D:/FIR/coef_log.txt D:/FIR/coef_in.txt MCV M4K MSYM 4 1 SGL 1 8
The program checks for symmetry automatically, but you can force it to disallow
symmetry. Your specification should be consistent with the setting in the FIR
Compiler wizard.
The reloading capability allows you to change coefficient values. These filters may
contain optimizations for symmetrical filters. If you want a filter that may need both
symmetrical and non-symmetrical filters, turn on Force Non-Symmetrical Structures
in the Architecture Specification section of the Parameterize FIR Compiler page.
where:
<FIR structure> is:
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<coefficient store> is:
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<allow or disallow symmetry> is:
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<number of calculations for MCV|coefficient bit width for others> is:
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<number of coefficient sets> is the user-specified number of coefficient sets
<filter rate> is be specified as one of the following (SGL, INT, DEC)
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<filter factor> is an integer value representing the rate-changing factor.
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<coefficient bit width> is the integer value representing the user-specified coefficient
bit width, which ranges from 2-32
MCV—multicycle variable
SER—fully serial
MBS—multibit serial
PAR—fully parallel
LC—logic cells
M512—M512 and MLAB blocks
M4K—M4K and M9K blocks
AUTO—Automatic memory block selection
MSYM—Take advantage of symmetric coefficients
NOSYM—Use nonsymmetric coefficients
for multicycle variable filters, the number of clock cycles to calculate the result
for all other filters, use the coefficient bit width
SGL—Single Rate FIR Filter
INT—Interpolating FIR Filter
DEC—Decimating FIR Filter
For single-rate filters, this argument should be set to 1
For multirate FIR filters, this argument should be an integer between 1 and 16
FIR Compiler User Guide
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