IPR-FIR Altera, IPR-FIR Datasheet - Page 33

• Manufacturer Part Number: IPR-FIR
• Description: IP CORE Renewal Of IP-FIR
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IPR-FIR

• Software Application: IP CORE, DSP Filters And Transforms
• Supported Families: Arria GX, Arria II GX, Cyclone, HardCopy, Stratix
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Function: Finite Impulse Response Compiler
• License: Renewal License
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

Chapter 3: Parameter Settings
Specify the Input and Output Specifications
Figure 3–7. Analyzing the Coefficients
Specify the Input and Output Specifications
© December 2010 Altera Corporation
Figure 3–7
lobes of the fixed-point frequency response decrease when you change the bit width
from 8 (the default) to 12.
You can specify the Number of Input Channels (that is, the number of data streams
that generate an output for each stream) and the Input Number System in the
Parameterize - FIR Compiler page
shows the result after you have made the selections. Note that the side
(Figure
3–7).
FIR Compiler User Guide
3–9