IPR-FIR Altera, IPR-FIR Datasheet - Page 56

• Manufacturer Part Number: IPR-FIR
• Description: IP CORE Renewal Of IP-FIR
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IPR-FIR

• Software Application: IP CORE, DSP Filters And Transforms
• Supported Families: Arria GX, Arria II GX, Cyclone, HardCopy, Stratix
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Function: Finite Impulse Response Compiler
• License: Renewal License
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

4–14
Avalon-ST Data Transfer Timing
FIR Compiler User Guide
f
Table 4–1. Avalon-ST Interface Parameters
The Avalon Interface Specifications define many signal types many of which are
optional.
Compiler MegaCore function. Any signal type not explicitly listed in the table is not
included.
Table 4–2. Avalon-ST Interface Signal Types
For a full description of the Avalon-ST interface protocol, refer to the
Specifications.
Figure 4–11
Figure 4–11. Avalon-ST Interface
READY_LATENCY
BITS_PER_SYMBOL
SYMBOLS_PER_BEAT
SYMBOL_TYPE
ERROR_DESCRIPTION
ready
valid
data
channel
error
startofpacket
endofpacket
Signal Type
Table 4–2
shows the Avalon-ST interface signals.
Parameter Name
lists the signal types used by the Avalon-ST interfaces for the FIR
Data Source
startofpacket
endofpacket
channel
1
1
data width
log
2
1
1
error
valid
data
2
(number of channels)
Width
0
data width
1
signed/unsigned
00: No error
01: Missing startofpacket (SOP)
10: Missing endofpacket (EOP)
11: Unexpected EOP or any other error
ready
Data Sink
Sink to Source
Source to Sink
Source to Sink
Source to Sink
Source to Sink
Source to Sink
Source to Sink
© December 2010 Altera Corporation
Chapter 4: Functional Description
Value
Avalon Streaming Interface
Direction
Avalon Interface