ADUC7039BCP6Z-RL Analog Devices Inc, ADUC7039BCP6Z-RL Datasheet - Page 21

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ADUC7039BCP6Z-RL

Manufacturer Part Number
ADUC7039BCP6Z-RL
Description
Flash 64k ARM7 Dual 16-Bit ADC LIN I.C.
Manufacturer
Analog Devices Inc
Series
MicroConverter® ADuC7xxxr
Datasheet

Specifications of ADUC7039BCP6Z-RL

Core Processor
ARM7
Core Size
16/32-Bit
Speed
20.48MHz
Connectivity
LIN, SPI
Peripherals
POR, Temp Sensor, WDT
Number Of I /o
6
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 18 V
Data Converters
A/D 2x16b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 115°C
Package / Case
32-LFCSP
Lead Free Status / RoHS Status
Lead free by exemption / RoHS compliant by exemption
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free by exemption / RoHS compliant by exemption

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADUC7039BCP6Z-RL
Manufacturer:
NS/国半
Quantity:
20 000
FLASH/EE MEMORY SECURITY
The 62 kB of Flash/EE memory available to the user can be
read- and write-protected using the FEEHID register.
The MSB of FEEHID (Bit 31) protects the entire Flash/EE from
being read through JTAG.
Bits[30:0] of FEEHID protect Page 123 to Page 0 from writing.
Each bit protects four pages, that is, 2 kB. On the 30 kB version,
Bits[30:15] are unused.
Flash/EE Memory Protection Registers
Name:
Address:
Default Value:
Access:
Function:
Table 13. FEEHID and FEEPRO MMR Bit Designations
Bit
31
30 to 0
Description
Read protection.
This bit is cleared by user code to read protect the 62 kB Flash/EE block code.
This bit is set by user code to allow read access to the 62 kB Flash/EE block via JTAG.
Write protection bits.
When set by user code, these bits unprotect Page 0 to Page 123 of the 62 kB Flash/EE code memory. Each bit write
protects four pages, and each page consists of 512 bytes.
When cleared by user code, these bits write protect Page 0 to Page 123 of the 62 kB Flash/EE code memory. Each bit
write protects four pages, and each page consists of 512 bytes.
FEEHID and FEEPRO
0xFFFF0E20 (for FEEHID) and 0xFFFF0E1C (for FEEPRO)
0xFFFFFFFF (for FEEHID) and 0x00000000 (for FEEPRO)
Read/write
These registers are written by user code to configure the protection of the Flash/EE memory.
Rev. B | Page 21 of 92
The FEEPRO register mirrors the bit definitions of the FEEHID
MMR. The FEEPRO MMR allows user code to lock the pro-
tection or security configuration of the Flash/EE memory so
that the protection configuration is automatically loaded on
subsequent power-on or reset events. This flexibility allows
the user to temporarily set and test protection settings using
the FEEHID MMR and, subsequently, lock the required
protection configuration (using FEEPRO) when shipping
protection systems into the field.
ADuC7039

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