ADUC7039BCP6Z-RL Analog Devices Inc, ADUC7039BCP6Z-RL Datasheet - Page 72
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ADUC7039BCP6Z-RL
Manufacturer Part Number
ADUC7039BCP6Z-RL
Description
Flash 64k ARM7 Dual 16-Bit ADC LIN I.C.
Manufacturer
Analog Devices Inc
Series
MicroConverter® ADuC7xxxr
Datasheet
1.EVAL-ADUC7039QSPZ.pdf
(92 pages)
Specifications of ADUC7039BCP6Z-RL
Core Processor
ARM7
Core Size
16/32-Bit
Speed
20.48MHz
Connectivity
LIN, SPI
Peripherals
POR, Temp Sensor, WDT
Number Of I /o
6
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 18 V
Data Converters
A/D 2x16b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 115°C
Package / Case
32-LFCSP
Lead Free Status / RoHS Status
Lead free by exemption / RoHS compliant by exemption
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free by exemption / RoHS compliant by exemption
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADUC7039BCP6Z-RL
Manufacturer:
NS/国半
Quantity:
20 000
ADuC7039
GPIO Port Clear Register
Name:
Address:
Default Value:
Access:
Function:
Table 53. GPCLR MMR Bit Designations
Bit
31 to 22
21
20
19
18
17
16
15 to 0
GPCLR
0xFFFF0D18
N/A
Write only
This 32-bit MMR allows user code to individually bit address external GPIO pins to clear them low only. User code
can accomplish this using the GPCLR MMR without having to modify or maintain the status of any other GPIO pins
(as user code requires when using GPDAT).
Description
Reserved. These bits are reserved and should be written as 0 by user code.
Port 0.5 clear bit.
This bit is set to 1 by user code to clear the external GPIO_5 pin low.
If user software clears this bit to 0, it has no effect on the external GPIO_5 pin.
Port 0.4 clear bit.
This bit is set to 1 by user code to clear the external GPIO_4 pin low.
If user software clears this bit to 0, it has no effect on the external GPIO_4 pin.
Port 0.3 clear bit.
This bit is set to 1 by user code to clear the external GPIO_3 pin low.
If user software clears this bit to 0, it has no effect on the external GPIO_3 pin.
Port 0.2 clear bit.
This bit is set to 1 by user code to clear the external GPIO_2 pin low.
If user software clears this bit to 0, it has no effect on the external GPIO_2 pin.
Port 0.1 clear bit.
This bit is set to 1 by user code to clear the external GPIO_1 pin low.
If user software clears this bit to 0, it has no effect on the external GPIO_1 pin.
Port 0.0 clear bit.
This bit is set to 1 by user code to clear the external GPIO_0 pin low.
If user software clears this bit to 0, it has no effect on the external GPIO_0 pin.
Reserved. These bits are reserved and should be written as 0 by user code.
Rev. B | Page 72 of 92