ADUC7039BCP6Z-RL Analog Devices Inc, ADUC7039BCP6Z-RL Datasheet - Page 26

• Manufacturer Part Number: ADUC7039BCP6Z-RL
• Description: Flash 64k ARM7 Dual 16-Bit ADC LIN I.C.
• Manufacturer: Analog Devices Inc
• Series: MicroConverter® ADuC7xxxr

Specifications of ADUC7039BCP6Z-RL

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 20.48MHz
• Connectivity: LIN, SPI
• Peripherals: POR, Temp Sensor, WDT
• Number Of I /o: 6
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 18 V
• Data Converters: A/D 2x16b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 115°C
• Package / Case: 32-LFCSP
• Lead Free Status / RoHS Status: Lead free by exemption / RoHS compliant by exemption
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free by exemption / RoHS compliant by exemption

ADuC7039
COMPLETE MMR LISTING
In the following MMR tables, addresses are listed in hex code. Access types include R for read, W for write, and RW for read and write.
Table 14. IRQ Address Base = 0xFFFF0000
Address
0x0000
0x0004
0x0008
0x000C
0x0010
0x0100
0x0104
0x0108
0x010C
Table 15. System Control Address Base = 0xFFFF0200
Address
0x0220
0x0230
0x0234
0x0244
1
Table 16. Timer Address Base = 0xFFFF0300
Address
0x0300
0x0304
0x0308
0x030C
0x0320
0x0324
0x0328
0x032C
0x0340
0x0344
0x0348
0x034C
1
Updated by kernel.
Updated by kernel.
Name
IRQSTA
IRQSIG
IRQEN
IRQCLR
SWICFG
FIQSTA
FIQSIG
FIQEN
FIQCLR
Name
SYSMAP
RSTSTA
RSTCLR
SYSCHK
Name
T0LD
T0VAL
T0CON
T0CLRI
T1LD
T1VAL
T1CON
T1CLRI
T2LD
T2VAL
T2CON
T2CLRI
1
1
Byte
4
4
4
4
4
4
4
4
4
Byte
1
1
1
4
Byte
2
1
4
1
1
2
4
4
4
4
4
2
Access
Type
RW
RW
W
RW
Access
Type
R
R
RW
W
W
R
R
RW
W
Access
Type
RW
R
RW
W
RW
R
RW
W
RW
R
RW
W
Default Value
0x00000000
0x00003080
0x00000000
N/A
N/A
0x00000000
0x00003081
0x00000000
N/A
Default Value
N/A
N/A
N/A
N/A
Default Value
0x0000
0x0000
0x0000
N/A
0x00000000
0xFFFFFFFF
0x0000
N/A
0x0050
0x00000050
0x0000
N/A
Rev. B | Page 26 of 92
Description
Active IRQ source.
Current state of all IRQ sources (enabled and disabled).
Enabled IRQ sources.
MMR to disable IRQ sources.
Active IRQ source.
Current state of all IRQ sources (enabled and disabled).
Enabled IRQ sources.
MMR to disable IRQ sources.
Description
REMAP control register.
Reset status MMR.
RSTSTA clear MMR.
Kernel checksum. See the System Kernel Checksum section.
Software interrupt configuration MMR.
Description
Timer0 load register.
Timer0 Value Register 0.
Timer0 control MMR.
Timer0 interrupt clear register.
Timer1 load register.
Timer1 value register.
Timer1 control MMR.
Timer1 interrupt clear register.
Timer2 load register.
Timer2 value register.
Timer2 control MMR.
Timer2 interrupt clear register.