DJLXT384LE Intel, DJLXT384LE Datasheet - Page 104

• Manufacturer Part Number: DJLXT384LE
• Manufacturer: Intel

Specifications of DJLXT384LE

• Lead Free Status / RoHS Status: Not Compliant

Intel
104
Table 64. Intel
®
LXT384 Octal T1/E1/J1 S/H PCM Transceiver with JA
Permissible cable attenuation
Receiver dynamic range
Signal to noise interference margin
Data decision threshold
Data slicer threshold
Loss of signal threshold
LOS hysteresis
Consecutive zeros before loss of signal
LOS reset
Low limit
input jitter
tolerance
Differential receiver input impedance
Input termination resistor tolerance
Common mode input impedance to ground
Input return
loss
LOS delay time
LOS reset
Receive intrinsic jitter, RCLK output
Receive
path delay
1. Guaranteed by design and other correlation methods.
1
®
LXT384 Transceiver T1 Receive Transmission Characteristics
1
0.1Hz to 1Hz
4.9Hz to 300Hz
10KHz to 100KHz
51 KHz - 102 KHz
102 - 2048 KHz
2048 KHz - 3072 KHz
Bipolar mode
Unipolar mode
Parameter
1
Sym
SRE
DR
S/I
–
–
–
–
–
–
-
-
-
-
-
-
-
-
12.5%
-16.5
Min.
100
138
0.5
0.4
63
28
20
20
20
10
–
–
–
–
-
-
-
-
-
0.035
Typ
150
200
175
70
50
70
20
30
–
–
–
–
1
6
-
-
-
0.0625
Max
250
255
12
77
±1
–
–
–
–
–
–
-
-
-
-
-
Unit
mV
mV
mV
U.I.
U.I.
U.I.
k Ω
k Ω
U.I.
U.I.
U.I.
dB
Vp
dB
dB
dB
dB
µs
%
%
–
–
-
Revision Date: November 28, 2005
@ 772 KHz
@ 655 ft. of 22 ABAM
cable
Relative to peak input
voltage
T1.231 - 1993
1’s density
AT&T Pub. 62411
@772 kHz
Measured against
nominal impedance.
Using components in
the LXD384 evaluation
board.
Data recovery mode
Data recovery mode
Wide band jitter
JA Disabled
Document Number: 248994
Test Condition
Revision Number: 005