DJLXT384LE Intel, DJLXT384LE Datasheet - Page 35
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DJLXT384LE
Manufacturer Part Number
DJLXT384LE
Description
Manufacturer
Intel
Datasheet
1.DJLXT384LE.pdf
(140 pages)
Specifications of DJLXT384LE
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Document Number: 248994
Revision Number: 005
Revision Date: November 28, 2005
Table 10. Line Interface Unit Signals (Sheet 2 of 3)
OE
RRING7
RRING6
RRING5
RRING4
RRING3
RRING2
RRING1
RRING0
RTIP7
RTIP6
RTIP5
RTIP4
RTIP3
RTIP2
RTIP1
RTIP0
TRING7
TRING6
TRING5
TRING4
TRING3
TRING2
TRING1
TRING0
1. AI: Analog Input. AO: Analog Output. DI: Digital Input. DI/O: Digital Bidirectional Port. DO: Digital Output.
Signal
Name
QFP
114
138
133
126
121
139
132
127
120
135
130
123
118
Pin
66
61
54
49
67
60
55
48
63
58
51
46
PBGA
M10
Ball
C10
E14
A10
P10
M8
M7
M5
B7
D7
D8
B8
N8
N7
A7
C7
C8
A8
P8
P7
A5
C5
P5
L8
L7
Signal
Type
AO
DI
AI
AI
Intel
Output Driver Enable Input.
Either the (hardware) OE pin or the OER register can be used to
place the transmitter TRING and TTIP outputs immediately into a
high-impedance mode. This supports redundancy applications
without external mechanical relays.
When the LXT384 Transceiver is in the:
NOTE: In Host Processor mode, the OE pin when set low
Receive Ring Input 7:0.
RRING (and RTIP) are differential line receiver inputs (see
Section 6.3.2, “Receiver Inputs” on page
The differential signal received at both RRING and RTIP provides
either RDATA, or RPOS/RNEG, depending on mode of operation
(unipolar or bipolar).
NOTE: In clock-recovery mode, the differential signal received at
Receive Tip Input 7:0.
For the RTIP description, see RRING (above).
Transmit Ring Output 7:0.
TRING (and TTIP) outputs are used to generate a differential
output on the line side of the transmitter transformer.
When the LXT384 Transceiver is in:
®
• Hardware mode and OE is connected:
• Host Processor mode, instead of the OE pin, you can write a
• Hardware mode, and either OE or TCLK is low, TTIP (and
• Host Processor mode, TRING and TTIP can be placed in a
LXT384 Octal T1/E1/J1 S/H PCM Transceiver with JA
• Low, OE is used to disable all transmit output drivers at one
• High, OE is used to enable transmitter output drivers.
1 to the OE bit of the OER register to place individual TRING
and TTIP outputs into high-impedance. (See
Chapter 8.0,
TRING) are placed in a high-impedance tristate.
high-impedance tristate on a port-by-port basis by writing a 1
to the OE bit in the Output Enable Register (OER). OE or
TCLK low also places TTIP/TRING into high-impedance. (For
more information, see
time, and to place TRING and TTIP outputs into high-
impedance. All other internal circuitry stays active.
overrides the OER register setting.
both RRING and RTIP also provides the recovery clock,
RCLK. For more information on clock recovery, see
Section 6.3.1, “Receiver
“Registers”.)
Signal Description
Table 46
Clocking”.
in
Chapter 8.0,
48).
Table 46
“Registers”.)
in
35
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