DJLXT384LE Intel, DJLXT384LE Datasheet - Page 76

• Manufacturer Part Number: DJLXT384LE
• Manufacturer: Intel

Specifications of DJLXT384LE

• Lead Free Status / RoHS Status: Not Compliant

Intel
76
Table 26. Register Bit Names
®
LXT384 Octal T1/E1/J1 S/H PCM Transceiver with JA
Table 26
ID, Reset, and Control Registers
ID
Reset
Global Control
Loopback Registers
Analog
Loopback
Digital
Loopback
Remote
Loopback
Enable and Select Registers
AIS Interrupt
Enable
LOS Interrupt
Enable
Output Enable
TAOS Enable
Automatic
TAOS Select
LOS/AIS
Criteria Select
Status and Monitoring Registers
AIS Interrupt
Status
AIS Status
LOS Interrupt
Status
LOS Status
Monitor
Performance
Monitoring
Name
groups the LXT384 Transceiver registers by function and lists the bit names.
Register
RLOOP
ALOOP
monic
Mne-
AISIE
TAOS
LACS
AISIS
GCR
OER
MON
RES
ATS
LOS
AIS
LIE
LIS
DL
ID
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RW
R
R
R
R
R
AISIE7
TAOS7
LACS7
AISIS7
served
served
RES7
LOS7
ATS7
AIS7
LIE7
OE7
LIS7
AL7
DL7
RL7
ID7
Re-
Re-
7
RAISEN
TAOS6
LACS6
AISIE6
AISIS6
served
RES6
LOS6
ATS6
AIS6
LIE6
OE6
LIS6
DL6
RL6
AL6
Re-
ID6
6
TAOS5
AISIE5
LACS5
AISIS5
served
RES5
LOS5
CDIS
ATS5
LIE5
OE5
AIS5
LIS5
AL5
DL5
RL5
ID5
Re-
5
CODEN
TAOS4
AISIE4
LACS4
AISIS4
served
RES4
LOS4
ATS4
LIE4
AIS4
LIS4
OE4
AL4
DL4
RL4
Re-
ID4
Bit Names
4
FIFO64
TAOS3
LACS3
AISIE3
AISIS3
RES3
LOS3
ATS3
AIS3
LIE3
OE3
LIS3
DL3
RL3
AL3
ID3
A3
3
Revision Date: November 28, 2005
TAOS2
LACS2
AISIE2
AISIS2
RES2
JACF
LOS2
ATS2
LIE2
OE2
AIS2
LIS2
AL2
DL2
RL2
ID2
A2
2
Document Number: 248994
Revision Number: 005
JASEL1
TAOS1
AISIE1
LACS1
AISIS1
RES1
LOS1
ATS1
AIS1
LIE1
OE1
LIS1
AL1
DL1
RL1
ID1
A1
1
JASEL0
AISIE0
TAOS0
LACS0
AISIS0
RES0
LOS0
ATS0
AIS0
LIE0
OE0
LIS0
DL0
RL0
AL0
ID0
A0
0