DJLXT384LE Intel, DJLXT384LE Datasheet - Page 113
DJLXT384LE
Manufacturer Part Number
DJLXT384LE
Description
Manufacturer
Intel
Datasheet
1.DJLXT384LE.pdf
(140 pages)
Specifications of DJLXT384LE
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Document Number: 248994
Revision Number: 005
Revision Date: November 28, 2005
Figure 23. Intel
RDY
ALE
A4:0
D7:0
CS
WR
INT
Figure 23
multiplexed interface, and a write cycle takes place.
Tristate
(Connected High)
®
Processor Non-Multiplexed Interface - Write Timing
is a timing diagram for the Intel
tDRDY
tSCSW
Intel
®
tSAW
®
LXT384 Octal T1/E1/J1 S/H PCM Transceiver with JA
processor in the Host Processor mode, with a non-
ADDRESS
tVRDY
tVWR
WRITE DATA
tHCSW
tSDW
tDRDY
tHDW
tHAW
tINT
Tristate
tRDYZ
113
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