DJLXT384LE Intel, DJLXT384LE Datasheet - Page 12

• Manufacturer Part Number: DJLXT384LE
• Manufacturer: Intel

Specifications of DJLXT384LE

• Lead Free Status / RoHS Status: Not Compliant

Intel
1.2
1.3
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Table 1.
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LXT384 Octal T1/E1/J1 S/H PCM Transceiver with JA
Conventions and Terminology
Balls and pins. This document discusses two packages, both a low-profile octal-flat package (an
LQFP, which uses pins for signals) and a pin ball-grid array (a PBGA, which uses balls for signals).
In this document the term ‘pin’ refers to either a ball or a pin.
Mark. An analog AMI (Alternate Mark Inversion) line-interface signal, containing a digital logic
1. The mark is either a negative or a positive pulse.
Recovered Clock. A clock that is not generated, but is instead derived from received data on a
transceiver. The RTIP/RRING received signal is used to generate RCLK on the transceiver.
X = Don’t care.
Related Documents
Table 1
Transceiver.
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1+1 Protection without Relays Using Intel
Application Note
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Intel
Intel
Application Note
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Power-Up Rise Time - Application Note
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T1/E1/J1, N+1 Redundancy with Analog Switches and Intel
Preliminary Application Note
Transformer Specification for Intel
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Use the Intel
The Intel
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LXD384 - Evaluation Board for Octal T1/E1 Applications - Developer Manual
LXT380/1/4/6/8 Redundancy Applications - Application Note
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LXT384 Octal LIU and Intel
LXT384/6/8 Frequently Asked Questions
LXT384/6/8 Twisted Pair Interface - Without Component Changes - Application Note
LXT384/6/8 Universal 75/100/120 Ohm Interface
lists related documents for both the Intel
®
LXT385 Transceiver supports the E1 standard only.
®
LXT384 Transceiver for either E1 or T1 applications.
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®
LXT385 Octal PCM Transceiver. - Solutions for Slow
Transceiver Applications - Application Note
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LXT380/1/4/6/8 Hitless Protection Switching -
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LXT385 Transceiver and the Intel
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LXT3x Line Interface Units -
Revision Date: November 28, 2005
Document Number: 248994
Revision Number: 005
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