DJLXT384LE Intel, DJLXT384LE Datasheet - Page 28

• Manufacturer Part Number: DJLXT384LE
• Manufacturer: Intel

Specifications of DJLXT384LE

• Lead Free Status / RoHS Status: Not Compliant

Intel
5.3.2
28
®
LXT384 Octal T1/E1/J1 S/H PCM Transceiver with JA
Bipolar vs. Unipolar Operation - Transmit Side
Table 6 on page 22
using either bipolar or unipolar interface connections.
Depending on the state of a UBS7:0 pin, both the corresponding receiver and transmitter pins are
automatically set for either bipolar I/O or unipolar I/O.
When a TNEG/UBS pin is connected low:
When a TNEG/UBS pin is connected high for more than 16 consecutive MCLK clock cycles:
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TDATA - works in combination with BPV outputs, in unipolar mode.
TNEG - works in combination with TPOS, in bipolar mode.
TNEG/TPOS/TCLK lines are active, and bipolar I/O is selected.
TDATA/TCLK lines are active, and unipolar I/O is selected.
Polarity cannot be controlled on the TTIP/TRING outputs.
TCLK supplies the input synchronization for data transfer.
— A logic 1 on TNEG corresponds to the transmission of a negative pulse on TRING/TTIP.
— A logic 1 on TPOS corresponds to the transmission of a positive pulse on TRING/TTIP.
lists transmit-side framer/mapper signals, which connect to a framer/mapper
Table 8
lists details.
Revision Date: November 28, 2005
Document Number: 248994
Revision Number: 005