EP4CE55F23C8N Altera, EP4CE55F23C8N Datasheet - Page 185

• Manufacturer Part Number: EP4CE55F23C8N
• Description: IC CYCLONE IV FPGA 55K 484FBGA
• Manufacturer: Altera
• Series: CYCLONE® IV Er

Specifications of EP4CE55F23C8N

• Number Of Logic Elements/cells: 55856
• Number Of Labs/clbs: 3491
• Total Ram Bits: 2340000
• Number Of I /o: 324
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 484-FBGA
• Family Name: Cyclone IV
• Number Of Logic Blocks/elements: 55856
• # I/os (max): 324
• Logic Cells: 55856
• Ram Bits: 2396160
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 484
• Package Type: FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant

Chapter 8: Configuration and Remote System Upgrades in Cyclone IV Devices
Configuration
Figure 8–6. In-System Programming of Serial Configuration Devices
Notes to
(1) Connect these pull-up resistors to the V
(2) The nCEO pin is left unconnected or used as a user I/O pin when it does not feed the nCE pin of another device.
(3) Power up the V
(4) The MSEL pin settings vary for different configuration voltage standards and POR time. To connect the MSEL pins, refer to
(5) The diodes and capacitors must be placed as close as possible to the Cyclone IV device. You must ensure that the diodes and capacitors maintain
(6) When cascading Cyclone IV devices in a multi-device AS configuration, connect the repeater buffers between the master and slave devices for
(7) These pins are dual-purpose I/O pins. The nCSO pin functions as FLASH_nCE pin in AP mode. The ASDO pin functions as DATA[1] pin in AP
(8) Only Cyclone IV GX devices have an option to select CLKUSR (40 MHz maximum) as the external clock source for DCLK.
© December 2010 Altera Corporation
Table 8–4 on page
a maximum AC voltage of 4.1 V. The external diodes and capacitors are required to prevent damage to the Cyclone IV device AS configuration
input pins due to possible overshoot when programming the serial configuration device with a download cable. Altera recommends using the
Schottky diode, which has a relatively lower forward diode voltage (VF) than the switching and Zener diodes, for effective voltage clamping.
DATA[0] and DCLK. All I/O inputs must maintain a maximum AC voltage of 4.1 V. The output resistance of the repeater buffers must fit the
maximum overshoot equation outlined in
and FPP modes.
Figure
8–6:
CC
Configuration Device
of the ByteBlaster II or USB-Blaster download cable with the 3.3-V supply.
8–8, and
Figure 8–6
Serial
Table 8–5 on page
DCLK
DATA
ASDI
nCS
10 kΩ
V
shows the download cable connections to the serial configuration device.
CCIO
CCIO
10 kΩ
“Configuration and JTAG Pin I/O Requirements” on page
supply of the bank in which the pin resides.
(1)
GND
8–9. Connect the MSEL pins directly to V
10 kΩ
(5)
V
10 pf
CCIO
(5)
3.3 V
GND
(1)
GND
3.3 V
10 kΩ
10 pf
V
10 pf
CCIO
3.3 V
GND
(1)
3.3 V
GND
10 pf
ByteBlaster II or USB Blaster
nSTATUS
CONF_DONE
nCONFIG
nCE
DATA[0] (6)
DCLK (6)
nCSO (7)
ASDO (7)
Pin 1
CCA
10-Pin Male Header
or GND.
Cyclone IV Device
8–5.
3.3 V (3)
Cyclone IV Device Handbook, Volume 1
GND
GND
CLKUSR
MSEL[ ]
nCEO
Table 8–3 on page
N.C. (2)
(4)
(8)
8–19
8–8,