LPC47B272-MS SMSC, LPC47B272-MS Datasheet - Page 126

• Manufacturer Part Number: LPC47B272-MS
• Description: IC CTRLR SUPER I/O LPC 100-QFP
• Manufacturer: SMSC

Specifications of LPC47B272-MS

• Controller Type: I/O Controller
• Interface: LPC
• Voltage - Supply: 3.3V
• Current - Supply: 15mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 638-1019

ISA IRQ TO SERIAL IRQ CONVERSION CAPABILITY
Pins 92, and 94-100 have the ISA IRQs muxed onto the GPIO pins as inputs. If the IRQ function is
chosen for these pins via the GPIO registers, then the associated IRQ input will appear in the serial IRQ
stream if the IRQ is not used by an internal device.
The ISA IRQs that are supported for this
functionality are IRQ3, IRQ4, IRQ5, IRQ7, IRQ9, IRQ10, IRQ11, IRQ15. See the GPIO section for
configuration information.
The internal IRQs that are used for the devices in the part are given precedence over the IRQs on the
GPIO pins. That is, if the IRQx is selected for an activated logical device in the part through register
0x70, and it is enabled for use (see description below), then if the same IRQx is programmed on its
associated GPIO pin, the external IRQx will be blocked from the serial IRQ frame. If however the IRQx
is selected for an activated logical device in the part through register 0x70, and it is NOT enabled for
use, then if the same IRQx is programmed on its associated GPIO pin, this external IRQ will go onto the
serial IRQ frame. If the logical device is not activated then the IRQx is not considered enabled.
Therefore, if an IRQ is selected for the logical device through register 0x70 and the logical device is
activated, then the enable bit for the device, if present, is used to control whether the internal IRQ or the
external IRQ on a GPIO is placed onto the serial stream. The following devices have an enable bit:
FDC, UART 1, UART2, UART3 and the parallel port. See “Note A. Logical Device IRQ and DMA
Operation” in the “Configuration” section.
The following devices do not have an enable bit: keyboard, mouse, WDT and MPU-401. For these
devices, the interrupt is enabled as follows: programming an IRQ in register 0x70 of logical device 7
enables the keyboard interrupt, programming an IRQ in register 0x72 of logical device 7 enables the
mouse interrupt and programming an interrupt in the WDT_CFG register enables the WDT interrupt and
programming an IRQ in register 0x70 of logical device B enables the MPU-401 interrupt. Note that the
logical device must also be activated for the interrupt to be enabled.
User Note: In order to use the ISA IRQs muxed onto the GPIO pins, the corresponding IRQ must not be
used for any of the devices in the LPC47B27x.
SMSC LPC47B27x
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Rev. 04-17-07
DATASHEET