LPC47B272-MS SMSC, LPC47B272-MS Datasheet - Page 50

IC CTRLR SUPER I/O LPC 100-QFP

LPC47B272-MS

Manufacturer Part Number
LPC47B272-MS
Description
IC CTRLR SUPER I/O LPC 100-QFP
Manufacturer
SMSC
Datasheet

Specifications of LPC47B272-MS

Controller Type
I/O Controller
Interface
LPC
Voltage - Supply
3.3V
Current - Supply
15mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
100-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
638-1019

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The Seek, Relative Seek, and Recalibrate commands have no result phase. The Sense Interrupt Status command must
be issued immediately after these commands to terminate them and to provide verification of the head position (PCN).
The H (Head Address) bit in ST0 will always return a "0". If a Sense Interrupt Status is not issued, the drive will continue
to be BUSY and may affect the operation of the next command.
Sense Drive Status
Sense Drive Status obtains drive status information. It has not execution phase and goes directly to the result phase
from the command phase. Status Register 3 contains the drive status information.
Specify
The Specify command sets the initial values for each of the three internal times. The HUT (Head Unload Time) defines
the time from the end of the execution phase of one of the read/write commands to the head unload state. The SRT
(Step Rate Time) defines the time interval between adjacent step pulses. Note that the spacing between the first and
second step pulses may be shorter than the remaining step pulses. The HLT (Head Load Time) defines the time
between when the Head Load signal goes high and the read/write operation starts. The values change with the data
rate speed selection and are documented in Table 26. The values are the same for MFM and FM.
DMA operation is selected by the ND bit. When ND is "0", the DMA mode is selected. In DMA mode, data transfers are
signaled by the DMA request cycles.
Configure
The Configure command is issued to select the special features of the FDC. A Configure command need not be issued
if the default values of the FDC meet the system requirements.
Configure Default Values:
EIS - No Implied Seeks
EFIFO - FIFO Disabled
POLL - Polling Enabled
FIFOTHR - FIFO Threshold Set to 1 Byte
PRETRK - Pre-Compensation Set to Track 0
EIS - Enable Implied Seek. When set to "1", the FDC will perform a Seek operation before executing a read or write
command. Defaults to no implied seek.
SMSC LPC47B27x
00
01
02
7F
7F
E
F
0
1
..
..
2M
64
56
60
4
..
63.5
2M
0.5
64
63
1
..
128
112
120
1M
8
..
SE
0
1
1
500K
256
224
240
Table 26 - Drive Control Delays (ms)
16
..
Table 25 - Interrupt Identification
HUT
128
126
127
1M
1
2
..
11
00
01
IC
300K
26.7
426
373
400
DATASHEET
..
Polling
Normal termination of Seek or
Recalibrate command
Abnormal termination of Seek
or Recalibrate command
250K
512
448
480
INTERRUPT DUE TO
32
- 50 -
..
500K
256
252
254
2
4
..
3.75
0.25
2M
0.5
4
..
HLT
1M
7.5
0.5
8
..
1
300K
426
420
423
3.3
6.7
..
500K
16
15
..
2
1
SRT
300K
26.7
3.33
1.67
25
Rev. 04-17-07
..
250K
512
504
508
4
8
.
250K
32
30
4
2
..

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