LPC47B272-MS SMSC, LPC47B272-MS Datasheet - Page 74

• Manufacturer Part Number: LPC47B272-MS
• Description: IC CTRLR SUPER I/O LPC 100-QFP
• Manufacturer: SMSC

Specifications of LPC47B272-MS

• Controller Type: I/O Controller
• Interface: LPC
• Voltage - Supply: 3.3V
• Current - Supply: 15mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 638-1019

The LPC47B27x incorporates an IBM XT/AT compatible parallel port. This supports the optional PS/2
type bi-directional parallel port (SPP), the Enhanced Parallel Port (EPP) and the Extended Capabilities
Port (ECP) parallel port modes. Refer to the Configuration Registers for information on disabling, power
down, changing the base address of the parallel port, and selecting the mode of operation.
The LPC47B27x also provides a mode for support of the floppy disk controller on the parallel port.
The parallel port also incorporates SMSC's ChiProtect circuitry, which prevents possible damage to the
parallel port due to printer power-up.
The functionality of the Parallel Port is achieved through the use of eight addressable ports, with their
associated registers and control gating. The control and data port are read/write by the CPU, the status
port is read/write in the EPP mode. The address map of the Parallel Port is shown below:
DATA PORT
STATUS PORT
CONTROL PORT
EPP ADDR PORT
The bit map of these registers is:
Note 1: These registers are available in all modes.
Note 2: These registers are only available in EPP mode.
(1) = Compatible Mode
SMSC LPC47B27x
DATA PORT
STATUS PORT
CONTROL
PORT
EPP ADDR
PORT
EPP DATA
PORT 0
EPP DATA
PORT 1
EPP DATA
PORT 2
EPP DATA
PORT 3
CONNECTOR
HOST
2-9
10
11
12
13
14
15
16
17
1
STROBE
TMOUT
PD0
PD0
PD0
PD0
PD0
PD0
D0
PIN NUMBER
68-75
BASE ADDRESS + 01H
BASE ADDRESS + 00H
BASE ADDRESS + 02H
BASE ADDRESS + 03H
83
80
79
78
77
82
81
66
67
AUTOFD
PD1
PD1
PD1
PD1
PD1
PD1
D1
0
Table 39 - Parallel Port Connector
nStrobe
PD<0:7>
nAck
Busy
PE
SLCT
nALF
nError
nInit
nSLCTIN
nINIT
PD2
PD2
PD2
PD2
PD2
PD2
D2
0
DATASHEET
PARALLEL PORT
STANDARD
nERR
PD3
SLC
PD3
PD3
PD3
PD3
PD3
D3
- 74 -
EPP DATA PORT 0
EPP DATA PORT 1
EPP DATA PORT 2
EPP DATA PORT 3
SLCT
IRQE
PD4
PD4
PD4
PD4
PD4
PD4
D4
nWrite
PData<0:7>
Intr
nWait
(User Defined)
(User Defined)
nDatastb
(User Defined)
nRESET
nAddrstrb
EPP
PCD
PD5
PD5
PD5
PD5
PD5
PD5
PE
D5
nACK
PD6
PD6
PD6
PD6
PD6
PD6
D6
0
nStrobe
PData<0:7>
nAck
Busy, PeriphAck(3)
PError,
nAckReverse(3)
Select
nAutoFd,
HostAck(3)
nFault(1)
nPeriphRequest(3)
nInit(1)
nReverseRqst(3)
nSelectIn(1,3)
BASE ADDRESS + 04H
BASE ADDRESS + 05H
BASE ADDRESS + 06H
BASE ADDRESS + 07H
nBUSY
PD7
PD7
PD7
PD7
PD7
PD7
D7
ECP
0
Rev. 04-17-07
Note
1
1
1
2
2
2
2
2