LPC47B272-MS SMSC, LPC47B272-MS Datasheet - Page 151

• Manufacturer Part Number: LPC47B272-MS
• Description: IC CTRLR SUPER I/O LPC 100-QFP
• Manufacturer: SMSC

Specifications of LPC47B272-MS

• Controller Type: I/O Controller
• Interface: LPC
• Voltage - Supply: 3.3V
• Current - Supply: 15mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 638-1019

INDEX
Configuration Mode
The system sets the logical device information and activates desired logical devices through the INDEX
and DATA ports. In configuration mode, the INDEX PORT is located at the CONFIG PORT address and
the DATA PORT is at INDEX PORT address + 1.
The desired configuration registers are accessed in two steps:
a. Write the index of the Logical Device Number Configuration Register (i.e., 0x07) to the INDEX PORT
b. Write the address of the desired configuration register within the logical device to the INDEX PORT
Note: If accessing the Global Configuration Registers, step (a) is not required.
Exit Configuration Mode
To exit the Configuration State the system writes 0xAA to the CONFIG PORT. The chip returns to the
RUN State.
Note: Only two states are defined (Run and Configuration). In the Run State the chip will always be ready
to enter the Configuration State.
Programming Example
The following is an example of a configuration program in Intel 8086 assembly language.
;----------------------------.
; ENTER CONFIGURATION MODE
;----------------------------'
MOV
MOV
OUT
;----------------------------.
; CONFIGURE REGISTER CRE0,
; LOGICAL DEVICE 8
;----------------------------'
MOV
MOV
OUT
MOV
MOV
OUT
;
MOV
MOV
OUT
MOV
MOV
OUT
;-----------------------------.
; EXIT CONFIGURATION MODE
;-----------------------------'
MOV
MOV
OUT
Notes: HARD RESET: nPCI_RESET pin asserted
SMSC LPC47B27x
0x02
0x03
0x07
and then write the number of the desired logical device to the DATA PORT
and then write or read the configuration register through the DATA PORT.
SOFT RESET: Bit 0 of Configuration Control register set to one
All host accesses are blocked for 500µs after Vcc POR (see Power-up Timing Diagram)
DX,02EH
AX,055H
DX,AL
DX,02EH
AL,07H
DX,AL ;Point to LD# Config Reg
DX,02FH
AL, 08H
DX,AL;Point to Logical Device 8
DX,02EH
AL,E0H
DX,AL ; Point to CRE0
DX,02fH
AL,02H
DX,AL ; Update CRE0
DX,02EH
AX,0AAH
DX,AL
TYPE
R/W
W
R
Table 62 – LPC47B27x Configuration Registers Summary
RESET
HARD
0x00
0x00
-
GLOBAL CONFIGURATION REGISTERS
VCC POR
|
|
|
|
0x00
0x00
DATASHEET
-
TR POR
- 151 -
0x00
0x00
-
RESET
SOFT
0x00
-
-
Config Control
Reserved – reads
return 0
Logical Device
Number
CONFIGURATION
REGISTER
Rev. 04-17-07