LPC47B272-MS SMSC, LPC47B272-MS Datasheet - Page 159

• Manufacturer Part Number: LPC47B272-MS
• Description: IC CTRLR SUPER I/O LPC 100-QFP
• Manufacturer: SMSC

Specifications of LPC47B272-MS

• Controller Type: I/O Controller
• Interface: LPC
• Voltage - Supply: 3.3V
• Current - Supply: 15mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 638-1019

Note 1: This chip uses address bits [A11:A0] to decode the base address of each of its logical devices.
Note 2: The Configuration Port is at either 0x02E or 0x04E (for SYSOPT=0 or SYSOPT=1) at power up
SMSC LPC47B27x
Primary Interrupt
Select
Default=0x00 or
0x06
on VCC POR,
VTR POR,
HARD RESET
and
SOFT RESET
LOGICAL
NUMBER
DEVICE
Config.
0x0A
0x0B
0x07
0x08
0x09
Port
NAME
(Note 1)
Bit 6 of the OSC Global Configuration Register (CR24) must be set to ‘1’ and Address Bits
[A15:A12] must be ‘0’ for 16 bit address qualification.
and can be relocated via the global configuration registers at 0x26 and 0x27.
Config. Port
Game Port
LOGICAL
Reserved
MPU-401
DEVICE
KYBD
PME
Table 65 - I/O Base Address Configuration Register Description
Table 66 - Interrupt Select Configuration Register Description
0x70 (R/W)
REG INDEX
REGISTER
0x26, 0x27
0x60,0x61
0x60,0x61
0x60,0x61
(Note 2)
INDEX
n/a
n/a
Bits[3:0] selects which interrupt is used for the primary
Interrupt.
Note: All interrupts are edge high (except ECP/EPP)
Note: nSMI is active low
DATASHEET
0x00= no interrupt selected
0x01= IRQ1
0x02= IRQ2/nSMI
0x03= IRQ3
0x04= IRQ4
0x05= IRQ5
0x06= IRQ6
0x07= IRQ7
0x08= IRQ8
0x09= IRQ9
0x0A= IRQ10
0x0B= IRQ11
0x0C= IRQ12
0x0D= IRQ13
0x0E= IRQ14
0x0F= IRQ15
Fixed Base Address: 60,64
on 128-byte boundaries
On 2 byte boundaries
on 2-byte boundaries
on 1 byte boundaries
- 159 -
[0x0100:0x0FFF]
[0x0100:0x0FFE]
[0x0000:0x0F7F]
Not Relocatable
0x0000:0x0FFE
BASE I/O
(NOTE 1)
RANGE
DEFINITION
n/a
+0 : Data Register
+4 : Command/Status
Reg.
n/a
+00: Game Port Register
+00 : PME Status
.
.
.
+5F : Keyboard Scan
Code
(See Table in “Runtime
Registers” section for Full
List)
+0: MIDI DATA
+1: STATUS/COMMAND
See Configuration
Registers in Table 54.
Accessed through the
index and DATA ports
located at the
Configuration Port
address and the
Configuration Port
address +1 respectively.
BASE OFFSETS
FIXED
Rev. 04-17-07
STATE
C