LPC47B272-MS SMSC, LPC47B272-MS Datasheet - Page 195
LPC47B272-MS
Manufacturer Part Number
LPC47B272-MS
Description
IC CTRLR SUPER I/O LPC 100-QFP
Manufacturer
SMSC
Datasheet
1.LPC47B272-MS.pdf
(195 pages)
Specifications of LPC47B272-MS
Controller Type
I/O Controller
Interface
LPC
Voltage - Supply
3.3V
Current - Supply
15mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
100-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
638-1019
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LPC47B272-MS
Manufacturer:
ADI
Quantity:
957
Company:
Part Number:
LPC47B272-MS
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
LPC47B272-MS
Manufacturer:
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Quantity:
20 000
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Setup
Warning: Ensure power supply is off during setup.
Testing
SMSC LPC47B27x
INITIAL CONFIG
END CONFIG
INITIAL CONFIG
1.
2.
3.
4.
1.
2.
3.
4.
5.
6.
7.
END CONFIG
STEP N
STEP 1
STEP 2
STEP 3
STEP 4
STEP 5
STEP N
STEP 1
STEP 2
STEP 3
STEP 4
STEP 5
Connect VSS (pins 7, 31, 60, & 76) and AVSS (pin 40) to ground.
Connect VCC (pins 53, 65 & 93), VTR (pin 18), and VREF (pin 44) to VCC (3.3V).
Connect an oscilloscope or voltmeter to FAN_TACH1 (pin 52).
All other pins should be tied to ground.
Turn power on.
With LAD0 (pin 20) and nLFRAME (pin 24) low, bring nPCI_RESET (pin 26) high. The chip is
now in XNOR chain test mode. At this point, all inputs to the XNOR chain are low. The output,
on FAN_TACH1 (pin 52), should also be low. Refer to INITIAL CONFIG on Truth Table 1.
Bring pin 100 high. The output on FAN_TACH1 (pin 52) should go high. Refer to STEP ONE
on Truth Table 1.
In descending pin order, bring each input high. The output should switch states each time an
input is toggled. Continue until all inputs are high. The output on FAN_TACH1 should now
be low. Refer to END CONFIG on Truth Table 1.
The current state of the chip is now represented by INITIAL CONFIG in Truth Table 2.
Each input should now be brought low, starting at pin one and continuing in ascending order.
Continue until all inputs are low. The output on FAN_TACH1 should now be low. Refer to
Truth Table 2.
To exit test mode, tie LAD0 (pin 20) OR nLFRAME (pin 24) high, and toggle nPCI_RESET
from a low to a high state.
…
PIN 1
TRUTH TABLE 1 - Toggling Inputs In Descending Order
TRUTH TABLE 2 - Toggling Inputs In Ascending Order
…
H
L
L
L
L
L
L
L
PIN
100
…
H
H
H
H
H
H
H
L
PIN 2
…
H
H
L
L
L
L
L
L
PIN
99
…
H
H
H
H
H
H
L
L
DATASHEET
PIN 3
…
H
H
H
L
L
L
L
L
PIN
98
…
H
H
H
H
H
L
L
L
PIN 4
- 195 -
PIN
…
H
H
H
H
97
…
L
L
L
L
H
H
H
H
L
L
L
L
PIN 5
PIN
96
…
…
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
PIN ...
PIN
…
...
H
H
L
L
L
L
L
L
…
H
H
H
H
H
H
L
L
PIN 1
PIN 100
…
H
L
L
L
L
L
L
L
…
H
H
H
H
H
H
H
L
OUTPUT
PIN 52
OUTPUT
Rev. 04-17-07
PIN 52
…
H
H
H
H
L
L
L
L
…
H
H
H
H
L
L
L
L
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