M69030 Asiliant Technologies, M69030 Datasheet - Page 194
M69030
Manufacturer Part Number
M69030
Description
Manufacturer
Asiliant Technologies
Datasheet
1.M69030.pdf
(387 pages)
Specifications of M69030
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Operating Temperature (max)
70C
Rad Hardened
No
Lead Free Status / Rohs Status
Supplier Unconfirmed
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Quantity
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Manufacturer:
CHIPS
Quantity:
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M69030P
Manufacturer:
MIT
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14-14
XR40
read/write at I/O address 3D7h with index at I/O address 3D6h set to 40h
shadowed for pipeline A and B
7-2
1
0
XR41-XR4F
read/write at I/O address 3D7h with index at I/O address 3D6h set to 41h to 4Fh
shared by both pipelines A and B
7-0
`efmp
A
B
A
&
B
Reserved (Writable)
Address Wrap
Memory Access Width
Memory Configuration Bits
69030 Databook
7
7
Memory Access Control Register
These bits should always be set to the value of 0.
0: Only bits 0 through 17 of the memory address decode are used, causing the memory
address to wrap at 256K for all memory accesses either through the VGA porthole or
linearly.
1: All memory address bits are used, allowing access to all of the graphics memory.
0: Selects the use of 16-bit accesses to memory to accommodate the standard VGA
modes and extended resolution modes with 4-bit color. This is the default after reset.
1: Selects the use of 64-bit accesses to memory to accommodate high resolution modes.
The bits in each of these registers provide various ways to configure various aspects of the
frame buffer.
Each of these registers defaults to a particular setting, and some of these settings are non-
zero. These default settings should NEVER be changed.
6
6
Memory Configuration Registers
Reserved (Writable)
Reserved (Writable)
5
5
(0000:00)
(0000:00)
Extension Registers
Memory Configuration Bits
4
4
(xxxx:xxxx)
3
3
2
2
Address
Address
Revision 1.3 11/24/99
Wrap
Wrap
(0)
(0)
1
1
Memory
Memory
Access
Access
(0)
(0)
0
0
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