M69030 Asiliant Technologies, M69030 Datasheet - Page 345

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M69030

Manufacturer Part Number
M69030
Description
Manufacturer
Asiliant Technologies
Datasheet

Specifications of M69030

Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Operating Temperature (max)
70C
Rad Hardened
No
Lead Free Status / Rohs Status
Supplier Unconfirmed

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PCB Layout Considerations
Clock synthesizers, like most analog components, must be isolated from the noise that exists on a PCB
power plane. Care must be taken not to route any high frequency digital signals in close proximity to the
analog sections. Inside the graphics controller chip, the clocks are physically located in the lower left corner
of the chip surrounded by low frequency input and output pins. This helps to minimize both internally and
externally coupled noise.
The memory clock and video clock power pins on the graphics controller chip each require similar RC
filtering to isolate the synthesizers from the V
CVCCn/CGND pair is shown below:
The suggested method for layout assumes a multilayer board including VCC and GND planes. All ground
connections should be made as close to the pin/component as possible. The CVCC trace should route from
the graphics controller through the pads of the filter components. The trace should NOT be connected to
the filter components by a stub. All components (particularly the nearest 0.1µF capacitor) should be placed
as close as possible to the graphics controller.
`efmp
69030 Databook
F
XRC0 = 211 - 2 = 209 (D1h)
XRC1= 30 - 2 = 28 (1Eh)
XRC3= 0010 0100 = 24h
REF
/ N = 157.3KHz
VDD
0.1µF
10Ω
47µF
+
Clock Generation
CC
plane and from each other. The filter circuit for each
0.1µF
DCKGND /
DCKVCC /
MCKGND
MCKVCC
Revision 1.3 11/24/99
B-5

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