M69030 Asiliant Technologies, M69030 Datasheet - Page 296

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M69030

Manufacturer Part Number
M69030
Description
Manufacturer
Asiliant Technologies
Datasheet

Specifications of M69030

Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Operating Temperature (max)
70C
Rad Hardened
No
Lead Free Status / Rohs Status
Supplier Unconfirmed

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16-14
MR1E/9E
read/write at I/O address 3D3h with index at address 3D2h set to index 1Eh/9Eh
shared & shadowed for each playback engine at MR1E, and cross-shared for the other at MR9E
7
6
5
4
3
`efmp
PB
PB
1
2
Engine En
Engine En
Playback
Playback
Playback Engine Enable
Playback Engine Pipeline Assignment
Playback Window Layering
Playback Interlacing
Playback Vertical Zoom Control
69030 Databook
(1)
(1)
7
0: The video playback engine to which this register belongs is disabled. This means that
all clocks to this playback engine have been shut off, and this playback engine can be
reassigned from one pipe to another using bit 6 of this register.
1: The video playback engine to which this register belongs is enabled. This means that
all clocks to this playback engine are connected, and this playback engine should not be
reassigned from one pipe to another. This is the default after reset.
For playback engine 1's copy of this register:
For playback engine 2's copy of this register:
This bit has effect only when both playback engines are being used on the same pipeline.
If both playback engines are being used on pipeline A:
If both playback engines are being used on pipeline B:
0: Selects non-interlaced playback.
1: Selects interlaced playback.
0: Vertical zoom controlled normally.
1: Vertical zoom controlled via V-Zoom Register.
Playback
Playback
Assign
Assign
Playback Control 1 Register
(0)
(0)
6
0: Video playback engine 1 is assigned to pipeline A.
1: Video playback engine 1 is assigned to pipeline B.
0: Video playback engine 2 is assigned to pipeline B.
1: Video playback engine 2 is assigned to pipeline A.
This bit is accessible via MR1E in pipeline A's copy of the MR register set and via
MR9E in pipeline B's copy of the MR register set.
0: If the playback windows for the two playback engines ever overlap, the video
playback window for video playback engine 1 will be on top.
1: If the playback windows for the two playback engines ever overlap, the video
playback window for video playback engine 2 will be on top.
This bit is accessible via MR1E in pipeline B's copy of the MR register set and via
MR9E in pipeline A's copy of the MR register set.
0: If the playback windows for the two playback engines ever overlap, the video
playback window for video playback engine 2 will be on top.
1: If the playback windows for the two playback engines ever overlap, the video
playback window for video playback engine 1 will be on top.
Playback
Layering
(0)
5
Multimedia Registers
Interlacing
Interlacing
Playback
Playback
(0)
(0)
4
Playback
Playback
V-Zoom
V-Zoom
(0)
(0)
3
Playback
Playback
H-Zoom
H-Zoom
(0)
(0)
2
Y-Display
Y-Display
Playback
Playback
Revision 1.3 11/24/99
(0)
(0)
1
H-Display
H-Display
Playback
Playback
(0)
(0)
0

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