M69030 Asiliant Technologies, M69030 Datasheet - Page 38

• Manufacturer Part Number: M69030
• Manufacturer: Asiliant Technologies

Specifications of M69030

• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Operating Temperature (max): 70C
• Rad Hardened: No
• Lead Free Status / Rohs Status: Supplier Unconfirmed

2-14
B69030 and M69030 Miscellaneous Pins
`efmp
BGA
U16
D17
A12
Pin
E4
C3
B2
B1
V1
T4
D6

mBGA
69030 Databook
P13
A14
Pin
C3
B3
A1
E5
N3
P2
A5
B8
REFCLK (MCLKIN)
GPIO1 (32KHz)
GPIO0 (ACTI)
(DCLKOUT2)
Pin Name
STNDBY#
Reserved
Reserved
DCLKIN
MCLKIN
TMD0
TMD1
Type Active Powered
I/O
I/O
I/O
n/a
n/a
In
In
In
In
High
High
High
High
High
High
Low
n/a
n/a
Pin Descriptions
IOVCC
& GND
IOVCC
& GND
IOVCC
& GND
IOVCC
& GND
IOVCC
& GND
IOVCC
& GND
IOVCC
& GND
Standby Control Pin. Pull this pin low to place the
chip in Standby Mode. A low-to-high transition on the
pin will cause change to exit standby mode, host
standby mode, and panel off mode.
Reference Clock Input. This pin serves as the input
for an external reference oscillator (usually
14.31818MHz). All internal timings are derived from
this primary clock input source. Alternatively, this
can be configured to be used as an alternate input for
an externally provided MCLK through a strapping
option and register programming. However, during
normal operation, an external MCLK should be
provided through the MCLKIN pin. See the
descriptions for registers XR70 and XRCF for
complete details.
Optional input for an externally provided DCLK. En-
abled via strapping option and register programming.
See the descriptions for registers XR70 and XRCF
for complete details.
Optional primary input for an externally provided
MCLK (the REFCLK(MCKLIN) pin can be used as an
alternate input for MCLK). This pin is enabled via
strapping option and register programming. See the
descriptions for registers XR70 and XRCF for com-
plete details.
General Purpose I/O pin #0. Can also be used as the
ACTI output (Activity Indicator).
General Purpose I/O pin #1. Can also be used as a
32KHz clock input for panel power sequencing.
Reserved
The default is reserved. May also be configured as
the 2nd display’s DCLK output in test mode.
These two pins are for internal use only and should
be left open.
Description
Revision 1.3 11/24/99