PI7C9X111SLBFDE Pericom Semiconductor, PI7C9X111SLBFDE Datasheet - Page 15

• Manufacturer Part Number: PI7C9X111SLBFDE
• Manufacturer: Pericom Semiconductor

Specifications of PI7C9X111SLBFDE

• Lead Free Status / Rohs Status: Compliant

2.4 MODE SELECT AND STRAPPING SIGNALS
2.5 JTAG BOUNDARY SCAN SIGNALS
2.6
2.7 POWER AND GROUND PINS
Pericom Semiconductor - Confidential
NAME
TM0
TM1
MSK_IN
REVRSB
NAME
TCK
TMS
TDO
TDI
TRST_L
MISCELLANEOUS SIGNALS
NAME
GPIO [3:0]
SMBCLK /
SCL
SMBDATA /
SDA
PME_L
NAME
VDDA
VDDP
VDDAUX
VTT
VDDC
VDDCAUX
VD33
PIN ASSIGNMENT
127
26
126
31
PIN ASSIGNMENT
28
27
32
29
30
PIN ASSIGNMENT
50, 51, 54, 55
3
4
1
PIN ASSIGNMENT
8, 20, 21
11, 23, 24
15
12
45, 65, 75, 94, 112
5
33, 53, 60, 70, 81, 91,
101, 111, 122
TYPE
TYPE
TYPE
B/IOD
TYPE
IU
IU
IU
IU
O
B
B
B
P
P
P
P
P
P
P
I
I
I
I
Page 15 of 78
DESCRIPTION
Mode Select 0: Mode Selection Pin to select EEPROM or SM Bus. TM0=0 for
EEPROM (I2C) support and TM0=1 for SM Bus support. TM0 is also a strapping
pin. See table 3-1 mode selection and 3-2 for strapping control.
Mode Select 1: Mode Selection Pin for normal operation. Set TM1=0 for normal
operation. TM1=1 is reserved.
Hot Plug Enable input.
Forward or Reverse Bridging Pin: REVRSB pin controls the Forward
(REVRSB=0) or Reverse (REVRSB=1) Bridge Mode of PI7C9X111SL. This pin is
also a strapping pin.
DESCRIPTION
Test Clock: TCK is the test clock to synchronize the state information and data on
the PCI bus side of PI7C9X111SL during boundary scan operation.
Test Mode Select: TMS controls the state of the Test Access Port (TAP) controller.
Test Data Output: TDO is the test data output and connects to the end of the JTAG
scan chain.
Test Data Input: TDI is the test data input and connects to the beginning of the
JTAG scan chain. It allows the test instructions and data to be serially shifted into the
PCI side of PI7C9X111SL.
Test Reset (Active LOW): TRST_L is the test reset to initialize the Test Access Port
(TAP) controller.
DESCRIPTION
General Purpose I/O Data Pins: The 4 general-purpose signals are programmable as
either input-only or bi-directional signals by writing the GPIO output enable control
register in the configuration space.
SMBUS / EEPROM Clock Pin: When EEPROM (I2C) interface is selected
(TM0=0), this pin is an output of SCL clock and connected to EEPROM clock input.
When SMBUS interface is selected (TM0=1), this pin is an input for the clock of
SMBUS.
SMBUS / EEPROM Data Pin: Data Interface Pin to EERPOM or SMBUS. When
EEPROM (I2C) interface is selected (TM0=0), this pin is a bi-directional signal.
When SMBUS interface is selected (TM0=1), this pin is an open drain signal.
Power Management Event Pin: Power Management Event Signal is asserted to
request a change in the device or link power state.
DESCRIPTION
Analog Voltage Supply for PCI Express Interface: Connect to the 1.0V Power
Supply.
Digital Voltage Supply for PCI Express Interface: Connect to the 1.0V Power
Supply.
Auxiliary Voltage Supply for PCI Express Interface: Connect to the 1.0V Power
Supply.
Termination Supply Voltage for PCI Express Interface: Connect to the 1.5V
Power Supply.
Core Supply Voltage: Connect to the 1.0V Power Supply.
Auxiliary Core Supply Voltage: Connect to the 1.0V Power Supply.
I/O Supply Voltage for PCI Interface: Connect to the 3.3V Power Supply for PCI
I/O Buffers.
Feb, 2010, Revision 1.5
PCIe-to-PCI Reversible Bridge
PI7C9X111SL