PI7C9X111SLBFDE Pericom Semiconductor, PI7C9X111SLBFDE Datasheet - Page 71

• Manufacturer Part Number: PI7C9X111SLBFDE
• Manufacturer: Pericom Semiconductor

Specifications of PI7C9X111SLBFDE

• Lead Free Status / Rohs Status: Compliant

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PI7C9X111SL is not equipped with standard hot-plug controller (SHPC) integrated. However, PI7C9X111SL
supports hot-plug signaling messages and registers to simplify the implementation of hot-plug system.
Using PI7C9X111SL on motherboard:
Using PI7C9X111SL on add-in card:
PRSNT1# and PRSNT2# are not implemented on both PI7C9X111SL. The use of these two signals is mandatory
on an add-in card in order to support hot-plug.
PI7C9X111SL requires the fundamental reset (PERST_L) input for internal logic when it is set as forward bridge
mode. PI7C9X111SL requires the PCI reset (RESET_L) input when it is set as reverse bridge mode. Also,
PI7C9X111SL has a power-on-reset (POR) circuit to detect VDDCAUX power supply for auxiliary logic control.
A cold reset is a fundamental or power-on reset that occurs right after the power is applied to PI7C9X111SL (during
initial power up). See section 7.1.1 of PCI Express to PCI Bridge Specification, Revision 1.0 for details.
A warm reset is a reset that triggered by the hardware without removing and re-applying the power sources to
PI7C9X111SL.
A hot reset is a reset that used an in-band mechanism for propagating reset across a PCIe link to PI7C9X111SL.
PI7C9X111SL will enter to training control reset when it receives two consecutive TS1 or TS2 order-sets with reset
bit set.
If the PCIe link goes down, the Transaction and Data Link Layer will enter DL_DOWN status. PI7C9X111SL
discards all transactions and returns all logic and registers to initial state except the sticky registers.
Pericom Semiconductor - Confidential
RESET SCHEME
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PI7C9X111SL supports hot-plug on PCI bus if forward bridging is selected (REVRSB=0).
PI7C9X111SL supports hot-plug function on PCI Express bus when reverse bridge mode is selected
(REVRSB=1).
PI7C9X111SL supports hot-plug on PCI Express bus in forward bridge mode. Hot-plug messages will be
generated by PI7C9X111SL based on the add-in card conditions.
PI7C9X111SL supports hot-plug function on PCI bus when reverse bridge mode is selected.
PI7C9X111SL will tri-state the PCI bus when RESET is asserted. Also, PI7C9X111SL will de-assert
INTA_L if RESET is asserted. The state machine of PI7C9X111SL PCI bus interface will remain idle if
the RESET is asserted. After RESET is de-asserted, PI7C9X111SL will remain in idle state until an
address phase containing a valid address for PI7C9X111SL or its downstream devices.
PI7C9X111SL expects the REFCLK signal will be provided to its upstream PCI Express Port prior to the
de-assertion of RESET. The Downstream PCI Port of PI7C9X111SL supports a range of frequency up to
66MHz.
PI7C9X111SL also supports subsystem vendor and subsystem ID. PI7C9X111SL will ignore target
response while the bus is idle.
Cold Reset:
Warm Reset:
Hot Reset:
DL_DOWN Reset:
Page 71 of 78
Feb, 2010, Revision 1.5
PCIe-to-PCI Reversible Bridge
PI7C9X111SL