PI7C9X111SLBFDE Pericom Semiconductor, PI7C9X111SLBFDE Datasheet - Page 65

• Manufacturer Part Number: PI7C9X111SLBFDE
• Manufacturer: Pericom Semiconductor

Specifications of PI7C9X111SLBFDE

• Lead Free Status / Rohs Status: Compliant

8
PCI Express interface:
PI7C9X111SL requires 100MHz differential clock inputs through the pins of REFCLKP and REFCLKN.
When the clock applied to PI7C9X111SLB and other end of the PCIe link are from the same clock source,
The MSK_IN input should be kept unchanged before and after reset (PERST_L for forward bridge or RESET_L
For reverse bridge). Otherwise, the MSK_IN input should be different before and after the reset.
PCI interface:
PI7C9X111SL generates four clock outputs, from either external clock input (1MHz to 66MHz) at CLKIN or
internal clock generator:
PI7C9X111SL can use configuration control to enable or disable the secondary clock output: CLKOUT[3:0].
PI7C9X111SL used either internally feedbacked clock from CLKOUT[0] or external clock input applied at
CLKOUT[0], for internal secondary interface logic.
For using internal clock source, the internal clock generator needs to be enabled with CLKIN driven high or low.
CLKIN and M66EN signals become the selection for PCI Frequency at 50MHz/25MHz or 66MHz/33MHz.
Frequency of PCI CLKOUT with internal clock source:
CLKIN
0
0
1
1
The PI7C9X111SL PCI Clock Outputs, CLKOUT [3:0], can be enabled or disabled through the configuration
register.
PI7C9X111SL supports three different implementation of PCI clock.
Pericom Semiconductor - Confidential
CLOCK SCHEME
•
•
•
Internal clock generator, and internal clock buffering.
External clock source, and internal clock buffering.
External clock source, and external clock buffering.
o
o
o
o
Internal feedback
External feedback
Internal feedback
External feedback
0
1
0
1
M66EN
PCI Clock
33MHz
66MHz
25MHz
50MHz
Page 65 of 78
Feb, 2010, Revision 1.5
PCIe-to-PCI Reversible Bridge
PI7C9X111SL