PI7C9X111SLBFDE Pericom Semiconductor, PI7C9X111SLBFDE Datasheet - Page 17

• Manufacturer Part Number: PI7C9X111SLBFDE
• Manufacturer: Pericom Semiconductor

Specifications of PI7C9X111SLBFDE

• Lead Free Status / Rohs Status: Compliant

3.1
3.2
Table 3-1 Mode Selection
Table 3-2 Pin Strapping
If TM1 is strapped to high, PI7C9X111SL uses TM0, REVRSB as the strapping pins at the PCIe PERST# de-
assertion transition in forward bridge mode or PCI RESET# de-assertion transition in reverse bridge mode.
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FUNCTIONAL MODE SELECTION
PI7C9X111SL uses TM1, TM0, and REVRSB pins to select different modes of operations. These three input
signals are required to be stable during normal operation. One of the eight combinations of normal operation can
be selected by setting the logic values for the three mode select pins. For example, if the logic values are low for
all three (TM1, TM0, and REVRSB) pins, the normal operation will have EEPROM (I2C) support with internal
arbiter in forward bridge mode. The designated operation with respect to the values of the TM1, TM0, and
REVRSB pins are defined on Table 3-1:
PIN STRAPPING
If TM1 is strapped to low, PI7C9X111SL uses REQ_L[3:2], REVRSB as the strapping pins at the PCIe PERST#
de-assertion to enable Clock Power Management feature.
TM1 Strapped
TM1 Strapped
TM1
0
0
0
0
0
1
1
1
REQ_L[3:2]
TM0 Strapped
TM0
X
X
0
1
2’b0
1
0
0
REVRSB
X
X
0
1
REVRSB Strapped
REVRSB Strapped
Page 17 of 78
X
0
1
0
EEPROM (I2C) support
SM Bus support
Forward bridge mode
Reverse bridge mode
Functional Mode
Test Functions
Clock Power Management is
enabled, only two PCI devices
supported.
CLKOUT[2] is used as CLKREQ#
CLKOUT[3] is used as CLKRUN#
Test Functions
Short initialization
Functional Loopback Test
Bridge test (PRBS, IDDQ, etc..)
Feb, 2010, Revision 1.5
PCIe-to-PCI Reversible Bridge
PI7C9X111SL