PI7C9X111SLBFDE Pericom Semiconductor, PI7C9X111SLBFDE Datasheet - Page 76

• Manufacturer Part Number: PI7C9X111SLBFDE
• Manufacturer: Pericom Semiconductor

Specifications of PI7C9X111SLBFDE

• Lead Free Status / Rohs Status: Compliant

15.3 AC SPECIFICATIONS
PI7C9X111SL is capable of sustaining 2000V human body model for the ESD protection without any damages.
1. See Figure 16 –1 PCI Signal Timing Measurement Conditions.
2. All PCI interface signals are synchronized to CLKOUT0.
3. Point-to-point signals are REQ_L [7:0], GNT_L [7:0], LOO, and ENUM_L. Bused signals are AD, CBE,
4. REQ_L signals have a setup of 10ns and GNT_L signals have a setup of 12ns.
Figure 15-1 PCI signal timing conditions
Pericom Semiconductor - Confidential
Table 15-3 PCI bus timing parameters
Symbol
Tsu
Tsu (ptp)
Th
Tval
Tval (ptp)
Ton
Toff
PAR, PERR_L, SERR_L, FRAME_L, IRDY_L, TRDY_L, LOCK_L, STOP_L and IDSEL.
Parameter
Input setup time to CLK – bused signals
Input setup time to CLK – point-to-point
Input signal hold time from CLK
CLK to signal valid delay – bused signals
CLK to signal valid delay – point-to-point
Float to active delay
Active to float delay
1,2
1,2
1,2
1,2,3
Page 76 of 78
1,2,3
1,2,3
1,2,3
MIN
3
5
0
2
2
2
-
66 MHz
MAX
14
6
6
-
-
-
-
10, 12
MIN
7
0
2
2
2
-
Feb, 2010, Revision 1.5
PCIe-to-PCI Reversible Bridge
33 MHz
4
MAX
11
12
28
-
-
-
-
PI7C9X111SL
Units
ns