LPC4350FET256,551 NXP Semiconductors, LPC4350FET256,551 Datasheet - Page 115
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LPC4350FET256,551
Manufacturer Part Number
LPC4350FET256,551
Description
IC MCU 32BIT 256LBGA
Manufacturer
NXP Semiconductors
Series
LPC43xxr
Datasheet
1.LPC4310FET100551.pdf
(145 pages)
Specifications of LPC4350FET256,551
Core Processor
ARM® Cortex™-M4/M0
Core Size
32-Bit Dual-Core
Speed
150MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, LCD, Motor Control PWM, POR, PWM, WDT
Number Of I /o
146
Program Memory Size
-
Program Memory Type
ROMless
Eeprom Size
-
Ram Size
264K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-LBGA
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LPC4350FET256,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
Table 18.
C
Table 19.
C
LPC4350_30_20_10
Objective data sheet
Symbol
t
t
t
t
t
t
Read cycle parameters
t
t
Write cycle parameters
t
t
Symbol
Common to read and write cycles
T
t
t
t
t
t
t
t
t
t
t
t
t
Read cycle parameters
t
t
Write cycle parameters
t
t
d(WV)
h(W)
d(GV)
h(G)
d(AV)
h(A)
su(D)
h(D)
d(QV)
h(Q)
d(SV)
h(S)
d(RASV)
h(RAS)
d(CASV)
h(CAS)
d(WV)
h(W)
d(GV)
h(G)
d(AV)
h(A)
su(D)
h(D)
d(QV)
h(Q)
L
L
cy(clk)
= 30 pF, T
= 30 pF, T
Dynamic characteristics: Dynamic external memory interface, read strategy bits (RD bits) = 00
Dynamic characteristics: Dynamic external memory interface, read strategy bits (RD bits) = 01
amb
amb
Parameter
write valid delay time
write hold time
output enable valid delay time
output enable hold time
address valid delay time
address hold time
data input set-up time
data input hold time
data output valid delay time
data output hold time
Parameter
clock cycle time
chip select valid delay time
chip select hold time
row address strobe valid delay time
row address strobe hold time
column address strobe valid delay time
column address strobe hold time
write valid delay time
write hold time
output enable valid delay time
output enable hold time
address valid delay time
address hold time
data input set-up time
data input hold time
data output valid delay time
data output hold time
=
=
40
40
C to 85
C to 85
C, V
C, V
DD(REG)(3V3)
DD(REG)(3V3)
All information provided in this document is subject to legal disclaimers.
Rev. 2.1 — 23 September 2011
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Conditions
Conditions
32-bit ARM Cortex-M4/M0 microcontroller
LPC4350/30/20/10
Min
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© NXP B.V. 2011. All rights reserved.
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…continued
115 of 145
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