LPC4350FET256,551 NXP Semiconductors, LPC4350FET256,551 Datasheet - Page 21

• Manufacturer Part Number: LPC4350FET256,551
• Description: IC MCU 32BIT 256LBGA
• Manufacturer: NXP Semiconductors
• Series: LPC43xxr

Specifications of LPC4350FET256,551

• Core Processor: ARM® Cortex™-M4/M0
• Core Size: 32-Bit Dual-Core
• Speed: 150MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, LCD, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 146
• Program Memory Size: -
• Program Memory Type: ROMless
• Eeprom Size: -
• Ram Size: 264K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-LBGA
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

NXP Semiconductors
Table 3.
LCD, Ethernet, USB0, and USB1 functions are not available on all parts. See
LPC4350_30_20_10
Objective data sheet
Symbol
P3_3
P3_4
P3_5
Pin description
B14
A15
C12
x
x
x
…continued
A7
B8
B7
169 118
171 119
173 121 84
All information provided in this document is subject to legal disclaimers.
Rev. 2.1 — 23 September 2011
81
82
[5]
[3]
[3]
I; PU -
I; PU I/O GPIO1[14] — General purpose digital input/output
I; PU I/O GPIO1[15] — General purpose digital input/output
I/O SPI_SCK — Serial clock for SPI.
I/O SSP0_SCK — Serial clock for SSP0.
O
O
-
O
I/O I2S1_TX_SCK — Receive Clock. It is driven by the
-
-
I/O SPIFI_SIO3 — I/O lane 3 for SPIFI.
O
I/O I2S0_TX_WS — Transmit Word Select. It is driven by
I/O I2S1_RX_SDA — I2S1 Receive data. It is driven by
O
-
-
I/O SPIFI_SIO2 — I/O lane 2 for SPIFI.
I
I/O I2S0_TX_SDA — I2S transmit data. It is driven by the
I/O I2S1_RX_WS — Receive Word Select. It is driven by
O
Description
R — Function reserved.
SPIFI_SCK — Serial clock for SPIFI.
CGU_OUT1 — CGU spare clock output 1.
R — Function reserved.
I2S0_TX_MCLK — I2S transmit master clock.
master and received by the slave. Corresponds to the
signal SCK in the I
pin.
R — Function reserved.
R — Function reserved.
U1_TXD — Transmitter output for UART 1.
the master and received by the slave. Corresponds to
the signal WS in the I
the transmitter and read by the receiver. Corresponds
to the signal SD in the I
LCD_VD13 — LCD data.
pin.
R — Function reserved.
R — Function reserved.
U1_RXD — Receiver input for UART 1.
transmitter and read by the receiver. Corresponds to
the signal SD in the I
the master and received by the slave. Corresponds to
the signal WS in the I
LCD_VD12 — LCD data.
32-bit ARM Cortex-M4/M0 microcontroller
Table
LPC4350/30/20/10
2.
2
S-bus specification.
2
2
2
S-bus specification.
S-bus specification.
S-bus specification.
2
S-bus specification.
© NXP B.V. 2011. All rights reserved.
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