LPC4350FET256,551 NXP Semiconductors, LPC4350FET256,551 Datasheet - Page 20

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LPC4350FET256,551

Manufacturer Part Number
LPC4350FET256,551
Description
IC MCU 32BIT 256LBGA
Manufacturer
NXP Semiconductors
Series
LPC43xxr
Datasheet

Specifications of LPC4350FET256,551

Core Processor
ARM® Cortex™-M4/M0
Core Size
32-Bit Dual-Core
Speed
150MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, LCD, Motor Control PWM, POR, PWM, WDT
Number Of I /o
146
Program Memory Size
-
Program Memory Type
ROMless
Eeprom Size
-
Ram Size
264K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-LBGA
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LPC4350FET256,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
Table 3.
LCD, Ethernet, USB0, and USB1 functions are not available on all parts. See
LPC4350_30_20_10
Objective data sheet
Symbol
P3_0
P3_1
P3_2
Pin description
F13
G11
F11
x
x
x
…continued
A8
F7
G6
161 112
163 114
166 116
All information provided in this document is subject to legal disclaimers.
Rev. 2.1 — 23 September 2011
78
79
80
[3]
[3]
[3]
I; PU I/O I2S0_RX_SCK — I2S transmit clock. It is driven by
I; PU I/O I2S0_TX_WS — Transmit Word Select. It is driven by
I; PU I/O I2S0_TX_SDA — I2S transmit data. It is driven by the
O
I/O I2S0_TX_SCK — Receive Clock. It is driven by the
O
I/O SSP0_SCK — Serial clock for SSP0.
-
-
-
I/O I2S0_RX_WS — Receive Word Select. It is driven by
I
O
I/O GPIO5[8] — General purpose digital input/output pin.
-
O
-
I/O I2S0_RX_SDA — I2S Receive data. It is driven by
O
O
I/O GPIO5[9] — General purpose digital input/output pin.
-
O
-
Description
the master and received by the slave. Corresponds to
the signal SCK in the I
I2S0_RX_MCLK — I2S receive master clock.
master and received by the slave. Corresponds to the
signal SCK in the I
I2S0_TX_MCLK — I2S transmit master clock.
R — Function reserved.
R — Function reserved.
R — Function reserved.
the master and received by the slave. Corresponds to
the signal WS in the I
the master and received by the slave. Corresponds to
the signal WS in the I
CAN0_RD — CAN receiver input.
USB1_IND1 — USB1 Port indicator LED control
output 1.
R — Function reserved.
LCD_VD15 — LCD data.
R — Function reserved.
transmitter and read by the receiver. Corresponds to
the signal SD in the I
the transmitter and read by the receiver. Corresponds
to the signal SD in the I
CAN0_TD — CAN transmitter output.
USB1_IND0 — USB1 Port indicator LED control
output 0.
R — Function reserved.
LCD_VD14 — LCD data.
R — Function reserved.
32-bit ARM Cortex-M4/M0 microcontroller
Table
LPC4350/30/20/10
2.
2
S-bus specification.
2
2
2
S-bus specification.
2
S-bus specification.
S-bus specification.
S-bus specification.
2
S-bus specification.
© NXP B.V. 2011. All rights reserved.
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