LPC4350FET256,551 NXP Semiconductors, LPC4350FET256,551 Datasheet - Page 86

• Manufacturer Part Number: LPC4350FET256,551
• Description: IC MCU 32BIT 256LBGA
• Manufacturer: NXP Semiconductors
• Series: LPC43xxr

Specifications of LPC4350FET256,551

• Core Processor: ARM® Cortex™-M4/M0
• Core Size: 32-Bit Dual-Core
• Speed: 150MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, LCD, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 146
• Program Memory Size: -
• Program Memory Type: ROMless
• Eeprom Size: -
• Ram Size: 264K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-LBGA
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

NXP Semiconductors
LPC4350_30_20_10
Objective data sheet
7.22.3 Clock Generation Unit (CGU)
7.22.4 Internal RC oscillator (IRC)
7.22.5 PLL0USB (for USB0)
7.22.6 PLL0AUDIO (for audio)
7.22.7 System PLL1
modes. By default function 0 is selected for all pins with pull-up enabled.
Analog I/Os like one set of the ADC and the DAC pins as well as most USB functions
reside on separate pins and are not controlled through the SCU.
The Clock Generator Unit (CGU) generates several base clocks. The CGU outputs are
unrelated in frequency and phase and can have different clock sources within the CGU.
One CGU output is routed to the CLKOUT pins.
Within each clock area there may be multiple branch clocks, which offers very flexible
control for power-management purposes. All branch clocks are outputs of one of two
Clock Control Units (CCUs) and can be controlled independently. Branch clocks derived
from the same base clock are synchronous in frequency and phase.
The IRC is used as the clock source for the WWDT and/or as the clock that drives the
PLLs and subsequently the CPU. The nominal IRC frequency is 12 MHz. The IRC is
trimmed to 1 % accuracy over the entire voltage and temperature range.
Upon power-up or any chip reset, the LPC4350/30/20/10 use the IRC as the clock source.
Software may later switch to one of the other available clock sources.
PLL0 is a dedicated PLL for the USB0 High-speed controller.
PLL0 accepts an input clock frequency from an external oscillator in the range of 14 kHz
to 25 MHz. The input frequency is multiplied up to a high frequency with a Current
Controlled Oscillator (CCO). The CCO operates in the range of 4.3 MHz to 550 MHz.
The audio PLL PLL0AUDIO is a general purpose PLL with a very small step size. This
PLL accepts an input clock frequency derived from an external oscillator or internal IRC.
The input frequency is multiplied up to a high frequency with a Current Controlled
Oscillator (CCO). A sigma-delta converter modulates the PLL divider ratios to obtain the
desired output frequency. The output frequency can be set as a multiple of the sampling
frequency f
can range from 16 kHz to 192 kHz (16, 22.05, 32, 44.1, 48, 96,192) kHz.
The PLL1 accepts an input clock frequency from an external oscillator in the range of
10 MHz to 25 MHz. The input frequency is multiplied up to a high frequency with a Current
Controlled Oscillator (CCO). The multiplier can be an integer value from 1 to 32. The CCO
operates in the range of 156 MHz to 320 MHz, so there is an additional divider in the loop
to keep the CCO within its frequency range while the PLL is providing the desired output
frequency. The output divider may be set to divide by 2, 4, 8, or 16 to produce the output
clock. Since the minimum output divider value is 2, it is insured that the PLL output has a
50 % duty cycle. The PLL is turned off and bypassed following a chip reset and may be
enabled by software. The program must configure and activate the PLL, wait for the PLL
to lock, and then connect to the PLL as a clock source. The PLL settling time is 100 s.
s
to 32f
All information provided in this document is subject to legal disclaimers.
s
Rev. 2.1 — 23 September 2011
, 64f
s
, 128  f
s
, 256  f
32-bit ARM Cortex-M4/M0 microcontroller
s
, 384  f
LPC4350/30/20/10
s
and the sampling frequency f
© NXP B.V. 2011. All rights reserved.
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